Abstract: There is provided a misalignment detecting device being capable of detecting and correcting distortion of a spoked wheel with a simple configuration.

Abstract: In this urine flow meter, a water wheel which is caused to rotate by a flow of urine from a urine flow passage tube is provided at a lower end side of the urine flow passage tube. The shape of a tip portion of the urine flow passage tube that causes urine to hit on the water wheel constitutes a nozzle part in which the tip-side is acutely processed, and an opening is formed in a sidewall surface of the tip-side. A guide is provided in a urine flow passage and is disposed in such a way that a tip of the guide is elongated as far as a tip-side region of the mine flow passage tube. The water wheel is caused to rotate by the flow of urine, and the urine flow rate can be detected on the basis of the rotation detection information.

Abstract: There is provided a misalignment detecting device being capable of detecting and correcting distortion of a spoked wheel with a simple configuration.

Abstract: In this urine flow meter, a water wheel which is caused to rotate by a flow of urine from a urine flow passage tube is provided at a lower end side of the urine flow passage tube. The shape of a tip portion of the urine flow passage tube that causes urine to hit on the water wheel constitutes a nozzle part in which the tip-side is acutely processed, and an opening is formed in a sidewall surface of the tip-side. A guide is provided in a urine flow passage and is disposed in such a way that a tip of the guide is elongated as far as a tip-side region of the mine flow passage tube. The water wheel is caused to rotate by the flow of urine, and the urine flow rate can be detected on the basis of the rotation detection information.

Abstract: A highly integrated data structure for synthesizing a waveform is provided for facilitating integrated handling of the data. The data structure for waveform synthesis data or use in generation of a target waveform comprises, at a macro level, a macro waveform value data field for storing a waveform value data section including source waveform value data for use in the generation of the target waveform, and a macro (first) header including control data for forming a macro waveform in the target waveform using the source waveform value data included in the data field. At a micro level, the data structure according to the present invention comprises a micro waveform value data field, and a micro (second) header for generating a micro waveform in the target waveform using the waveform value data included in the micro waveform value data field.

Abstract: A genlock device comprises: means (31) for inputting an external reference signal; means (32,33,34,36,39,40,41,42,44) for generating a master reference clock signal synchronized in phase with the external reference signal; and means (37) for storing a genlock state. The genlock state includes, for example, absence of a synchronization signal in the external reference signal. The genlock device can further comprise: means (45) for storing a voltage value determined so that a voltage controlled oscillator (40) oscillates a signal having a frequency higher or lower by a predetermined value than a reference frequency of the voltage controlled oscillator; and means (44) for judging whether a voltage value which controls the voltage controlled oscillator is larger or smaller than the voltage value.

Abstract: A frame signal phase adjuster comprises units for inputting a parallel clock and a reference signal (22-4 and 22-1); generating a frame signal from the reference signal (22-1), adjusting a phase of the frame signal (22-3), generating an adjusted frame signal synchronized by the parallel clock from the parallel clock and the adjusted frame signal (22-4), generating a frame reset pulse signal based on the parallel clock and the adjusted frame signal synchronized by the parallel clock (22-2), and outputting the frame reset pulse signal (22-2). The unit (22-4) adjusts the phase of the frame signal so that the frame signal is constantly HIGH or LOW throughout a setup time and a hold time.

Abstract: A genlock device comprises: means (31) for inputting an external reference signal; means (32,33,34,36,39,40,41,42,44) for generating a master reference clock signal synchronized in phase with the external reference signal; and means (37) for storing a genlock state. The genlock state includes, for example, absence of a synchronization signal in the external reference signal. The genlock device can further comprise: means (45) for storing a voltage value determined so that a voltage controlled oscillator (40) oscillates a signal having a frequency higher or lower by a predetermined value than a reference frequency of the voltage controlled oscillator; and means (44) for judging whether a voltage value which controls the voltage controlled oscillator is larger or smaller than the voltage value.

Abstract: A frame signal phase adjuster comprises units for inputting a parallel clock and a reference signal (22-4 and 22-1); generating a frame signal from the reference signal (22-1), adjusting a phase of the frame signal (22-3), generating an adjusted frame signal synchronized by the parallel clock from the parallel clock and the adjusted frame signal (22-4), generating a frame reset pulse signal based on the parallel clock and the adjusted frame signal synchronized by the parallel clock (22-2), and outputting the frame reset pulse signal (22-2). The unit (22-4) adjusts the phase of the frame signal so that the frame signal is constantly HIGH or LOW throughout a setup time and a hold time.

Abstract: A slot apparatus for video capable of holding unit boards has a main board 3 and a plurality of connectors 4 provided on the main board 3. A slot part 5 is provided at a position facing the connectors 4. A plurality of unit guides 6 are provided at spacings in the slot part 5. A plurality of unit boards 10 are inserted into the slot part 5 along the unit guides 6. The unit boards 10 are connected to the connectors 4, respectively. The unit guides 6 are detachably provided.

Abstract: A highly integrated data structure for synthesizing a waveform is provided for facilitating integrated handling of the data. The data structure for waveform synthesis data or use in generation of a target waveform comprises, at a macro level, a macro waveform value data field for storing a waveform value data section including source waveform value data for use in the generation of the target waveform, and a macro (first) header including control data for forming a macro waveform in the target waveform using the source waveform value data included in the data field. At a micro level, the data structure according to the present invention comprises a micro waveform value data field, and a micro (second) header for generating a micro waveform in the target waveform using the waveform value data included in the micro waveform value data field.