Patents by Inventor Tomonari Morishita

Tomonari Morishita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7554305
    Abstract: Even when, for example, electric charge is injected into the output transistor due to external factor such as a noise from the outside, to prevent the step-down voltage from rising, the step-down circuit is comprised of an N channel type output transistor which controls the voltage at the control end, a booster, which is connected to the control end of the output transistor and raises the voltage at the control end and a discharge circuit, which discharges the electric charge at the control end of the output transistor so that the power supply voltage inputted from the input end is stepped down to a desired step-down voltage and outputted from the output end.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: June 30, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Hideo Nunokawa, Tatsuo Kato, Miki Suzuki, Tomonari Morishita
  • Patent number: 7429900
    Abstract: An object is not only to contribute to reduction in current consumption but also to advance actuation of a system required in a camera, an on-vehicle electric component, etc. by shortening a waiting time for stabilization of oscillation. An oscillator having an inverting amplifier inverting and amplifying an input signal and outputting it, a resonator connected to between an input and an output terminals of the inverting amplifier, a feedback resistance connected in parallel to the resonator, and an output circuit outputting a first clock signal based on a signal of an on-load parallel resonance frequency or a parallel resonance frequency oscillated by the resonator, the inverting amplifier and the feedback resistance to a function block is provided.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 30, 2008
    Assignees: Fujitsu Limited, Kyocera Kinseki Corporation
    Inventors: Hideo Nunokawa, Fukuji Kihara, Tomonari Morishita, Shunichi Ko, Hiroshi Ookawa
  • Patent number: 7196379
    Abstract: A semiconductor device in which a dielectric breakdown of a gate oxide in a MOS capacitor can be prevented and in which a circuit area can be reduced. The semiconductor device comprises an NMOS transistor a gate of which is connected to a terminal VDD on a high potential side and a PMOS transistor a gate of which is connected to a terminal GND on a low potential side, source/drain (S/D) regions of the NMOS transistor and source/drain (S/D) regions of the PMOS transistor being electrically connected.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: March 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Tomonari Morishita, Hideo Nunokawa, Suguru Tachibana, Fukuji Kihara
  • Patent number: 7042299
    Abstract: A crystal oscillation circuit has a reduced circuit area and enables to stably oscillate at low consumed current. The crystal oscillation circuit includes an oscillating amplifier and a constant voltage generator. The oscillating amplifier excites a resonator composed of a resistor, a crystal oscillator and a capacitor. The constant voltage generator includes a one-stage differential circuit composed of a transistor and a capacitor for suppressing transient fluctuation of a constant voltage Vreg for generating the constant voltage Vreg served as a supply voltage for the oscillating amplifier. By generating the constant voltage Vreg through the one-stage differential circuit, the phase lag of the constant voltage Vreg reaches 90 degrees at most. This eliminates the necessity of a phase compensation capacitor, resulting in making the circuit area smaller and realizing the stable oscillation at low consumed current.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: May 9, 2006
    Assignee: Fujitsu Limited
    Inventors: Suguru Tachibana, Tomonari Morishita, Fukuji Kihara, Makoto Kubota
  • Patent number: 7034514
    Abstract: A semiconductor device is disclosed including a current generator circuit that generates a first current substantially proportional to an absolute temperature, the first current being determined by a size ratio of a MOS transistor, and by a resistor; and a starting-up circuit that causes the current generator circuit to generate the first current at a stable working point of the current generator circuit, wherein while the current generator circuit operates at the stable working point, a current that flows through the starting-up circuit is determined by a diffusion resistance and a MOS transistor. When the current generator circuit starts operating at a stable operating point, resistance of the diffusion resistor and a MOS transistor connected in series determines a current that flows through a starting-up circuit. According to the above arrangements, the power consumption of the circuit can be reduced by increasing the resistance of the diffused resistor.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: April 25, 2006
    Assignee: Fujitsu Limited
    Inventors: Suguru Tachibana, Tatsuo Kato, Tomonari Morishita
  • Publication number: 20060071725
    Abstract: An object is not only to contribute to reduction in current consumption but also to advance actuation of a system required in a camera, an on-vehicle electric component, etc. by shortening a waiting time for stabilization of oscillation. An oscillator having an inverting amplifier inverting and amplifying an input signal and outputting it, a resonator connected to between an input and an output terminals of the inverting amplifier, a feedback resistance connected in parallel to the resonator, and an output circuit outputting a first clock signal based on a signal of an on-load parallel resonance frequency or a parallel resonance frequency oscillated by the resonator, the inverting amplifier and the feedback resistance to a function block is provided.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 6, 2006
    Applicants: FUJITSU LIMITED, KYOCERA KINSEKI CORPORATION
    Inventors: Hideo Nunokawa, Fukuji Kihara, Tomonari Morishita, Shunichi Ko, Hiroshi Ookawa
  • Publication number: 20060012354
    Abstract: Even when, for example, electric charge is injected into the output transistor due to external factor such as a noise from the outside, to prevent the step-down voltage from rising, the step-down circuit is comprised of an N channel type output transistor which controls the voltage at the control end, a booster, which is connected to the control end of the output transistor and raises the voltage at the control end and a discharge circuit, which discharges the electric charge at the control end of the output transistor so that the power supply voltage inputted from the input end is stepped down to a desired step-down voltage and outputted from the output end.
    Type: Application
    Filed: November 12, 2004
    Publication date: January 19, 2006
    Inventors: Hideo Nunokawa, Tatsuo Kato, Miki Suzuki, Tomonari Morishita
  • Publication number: 20050280084
    Abstract: A semiconductor device in which a dielectric breakdown of a gate oxide in a MOS capacitor can be prevented and in which a circuit area can be reduced. The semiconductor device comprises an NMOS transistor a gate of which is connected to a terminal VDD on a high potential side and a PMOS transistor a gate of which is connected to a terminal GND on a low potential side, source/drain (S/D) regions of the NMOS transistor and source/drain (S/D) regions of the PMOS transistor being electrically connected.
    Type: Application
    Filed: October 18, 2004
    Publication date: December 22, 2005
    Inventors: Tomonari Morishita, Hideo Nunokawa, Suguru Tachibana, Fukuji Kihara
  • Publication number: 20050174183
    Abstract: A crystal oscillation circuit has a reduced circuit area and enables to stably oscillate at low consumed current. The crystal oscillation circuit includes an oscillating amplifier and a constant voltage generator. The oscillating amplifier excites a resonator composed of a resistor, a crystal oscillator and a capacitor. The constant voltage generator includes a one-stage differential circuit composed of a transistor and a capacitor for suppressing transient fluctuation of a constant voltage Vreg for generating the constant voltage Vreg served as a supply voltage for the oscillating amplifier. By generating the constant voltage Vreg through the one-stage differential circuit, the phase lag of the constant voltage Vreg reaches 90 degrees at most. This eliminates the necessity of a phase compensation capacitor, resulting in making the circuit area smaller and realizing the stable oscillation at low consumed current.
    Type: Application
    Filed: April 6, 2005
    Publication date: August 11, 2005
    Inventors: Suguru Tachibana, Tomonari Morishita, Fukuji Kihara, Makoto Kubota
  • Publication number: 20050088163
    Abstract: A semiconductor device is disclosed including a current generator circuit that generates a first current substantially proportional to an absolute temperature, the first current being determined by a size ratio of a MOS transistor, and by a resistor; and a starting-up circuit that causes the current generator circuit to generate the first current at a stable working point of the current generator circuit, wherein while the current generator circuit operates at the stable working point, a current that flows through the starting-up circuit is determined by a diffusion resistance and a MOS transistor. When the current generator circuit starts operating at a stable operating point, resistance of the diffusion resistor and a MOS transistor connected in series determines a current that flows through a starting-up circuit. According to the above arrangements, the power consumption of the circuit can be reduced by increasing the resistance of the diffused resistor.
    Type: Application
    Filed: March 25, 2004
    Publication date: April 28, 2005
    Inventors: Suguru Tachibana, Tatsuo Kato, Tomonari Morishita
  • Patent number: 6392461
    Abstract: A clock modulator for in-vehicle electronic equipment requiring an EMI countermeasure optimally reduces undesired radiant noise by a low spectral dispersion number. A delay circuit has delay buffers DB0 to DB30 connected in series with each other, each outputting an output pulse delayed from an input pulse by a phase delay time &tgr;, and a selection circuit sequentially selecting an output pulse outputted from each of the delay buffers DB0 to DB30. Adjustment is made such that with respect to an input CLK inputted to the delay buffer DB0, a phase variation amount of the output pulse from the delay buffer DB0 and a phase variation amount of the output pulse from the delay buffer DB30 are near ±45° when a phase of the output pulse from the delay buffer DB15, at a center position of the delay buffers DB0 to DB30, is made a reference.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: May 21, 2002
    Assignee: Fujitsu Limited
    Inventors: Hideo Nunokawa, Naoto Emi, Tomonari Morishita
  • Publication number: 20010045857
    Abstract: The present invention relates to a clock modulator suitable for use in an in-vehicle electronic equipment requiring an EMI countermeasure, and has an object to provide a clock modulator which can optimally reduce undesired radiant noise by a low spectral dispersion number.
    Type: Application
    Filed: February 1, 2001
    Publication date: November 29, 2001
    Inventors: Hideo Nunokawa, Naoto Emi, Tomonari Morishita