Abstract: A lightly doped n-type semiconductor layer is epitaxially grown on a heavily doped n-type semiconductor substrate, and a heavily doped n-type impurity region, a lightly doped p-type deep guard ring and a heavily doped p-type shallow impurity region are formed in said lightly doped semiconductor layer in such a manner that a diode has a major p-n junction between the heavily doped n-type impurity region and the heavily doped p-type shallow impurity region and other p-n junction between the lightly doped n-type semiconductor layer and the lightly doped p-type guard ring, wherein the other p-n junction is wider in area than the major p-n junction so that the breakdown voltage is adjustable without increase of parasitic capacitance dominated by the other p-n junction.

Abstract: A lightly doped n-type semiconductor layer is epitaxially grown on a heavily doped n-type semiconductor substrate, and a heavily doped n-type impurity region, a lightly doped p-type deep guard ring and a heavily doped p-type shallow impurity region are formed in said lightly doped semiconductor layer in such a manner that a diode has a major p-n junction between the heavily doped n-type impurity region and the heavily doped p-type shallow impurity region and other p-n junction between the lightly doped n-type semiconductor layer and the lightly doped p-type guard ring, wherein the other p-n junction is wider in area than the major p-n junction so that the breakdown voltage is adjustable without increase of parasitic capacitance dominated by the other p-n junction.

Abstract: A lightly doped n-type semiconductor layer is epitaxially grown on a heavily doped n-type semiconductor substrate, and a heavily doped n-type impurity region, a lightly doped p- type deep guard ring and a heavily doped p-type shallow impurity region are formed in said lightly doped semiconductor layer in such a manner that a diode has a major p-n junction between the heavily doped n-type impurity region and the heavily doped p-type shallow impurity region and other p-n junction between the lightly doped n-type semiconductor layer and the lightly doped p-type guard ring, wherein the other p-n junction is wider in area than the major p-n junction so that the breakdown voltage is adjustable without increase of parasitic capacitance dominated by the other p-n junction.

Abstract: A method of making a semiconductor chip 1 having a first electrodes 11, 12 on main surface 1a thereof, a second electrode 13 made of a conductive resin electrode having a base portion 131 in contact with a surface 1b opposite to the main surface 1a of the semiconductor chip 1, and a side portion 132 extended from one end portion of the base portion 131 in the direction toward the main surface 1a of the semiconductor chip 1, wherein an end part of the side portion 132 of the second electrode 13 is exposed on the same side as the first electrodes 11, 12.

Abstract: A method of making a semiconductor chip 1 having a first electrodes 11, 12 on main surface la thereof, a second electrode 13 made of a conductive resin electrode having a base portion 131 in contact with a surface 1b opposite to the main surface 1a of the semiconductor chip 1, and a side portion 132 extended from one end portion of the base portion 131 in the direction toward the main surface 1a of the semiconductor chip 1, wherein an end part of the side portion 132 of the second electrode 13 is exposed on the same side as the first electrodes 11, 12.

Abstract: A lightly doped n-type semiconductor layer is epitaxially grown on a heavily doped n-type semiconductor substrate, and a heavily doped n-type impurity region, a lightly doped p-type deep guard ring and a heavily doped p-type shallow impurity region are formed in said lightly doped semiconductor layer in such a manner that a diode has a major p-n junction between the heavily doped n-type impurity region and the heavily doped p-type shallow impurity region and other p-n junction between the lightly doped n-type semiconductor layer and the lightly doped p-type guard ring, wherein the other p-n junction is wider in area than the major p-n junction so that the breakdown voltage is adjustable without increase of parasitic capacitance dominated by the other p-n junction.

Abstract: A semiconductor chip 1 has a first electrodes 11,12 on a main surface 0a thereof, a second electrode 13 made of a conductive resin electrode having a base portion 131 in contact with a surface 1b opposite to the main surface 1a of the semiconductor chip 1, and a side portion 132 extended from one end portion of the base portion 131 in the direction toward the main surface 1a of the semiconductor chip 1, and an end part of the side portion 132 of the second electrode 13 is provided over the main surface 1a of the semiconductor chip 1.