Patents by Inventor Tomonori MIZUSHIMA
Tomonori MIZUSHIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230402533Abstract: There is provided a semiconductor device in which the transistor portion has a first transistor region provided with the emitter region, the contact region, and the first base region; a second transistor region which is provided with the emitter region and the contact region and which is provided between the first transistor region and the diode portion; and a boundary region which includes the second base region and which is provided between the second transistor region and the diode portion, and at a front surface of the semiconductor substrate, an area of the contact region in the second transistor region is smaller than an area of the contact region in the first transistor region.Type: ApplicationFiled: April 25, 2023Publication date: December 14, 2023Inventors: Tomonori MIZUSHIMA, Tatsuya NAITO
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Publication number: 20220123112Abstract: A silicon carbide semiconductor device has an active region and a termination structure portion disposed outside of the active region. The silicon carbide semiconductor device includes a semiconductor substrate of a second conductivity type, a first semiconductor layer of the second conductivity type, a second semiconductor layer of a first conductivity type, first semiconductor regions of the second conductivity type, second semiconductor regions of the first conductivity type, a gate insulating film, a gate electrode, a first electrode, and a second electrode. During bipolar operation, a smaller density among an electron density and a hole density of an end of the second semiconductor layer in the termination structure portion is at most 1×1015/cm3.Type: ApplicationFiled: November 30, 2021Publication date: April 21, 2022Applicants: FUJI ELECTRIC CO., LTD., MITSUBISHI ELECTRIC CORPORATIONInventors: Takeshi TAWARA, Tomonori MIZUSHIMA, Shinichiro MATSUNAGA, Kensuke TAKENAKA, Manabu TAKEI, Hidekazu TSUCHIDA, Kouichi MURATA, Akihiro KOYAMA, Koji NAKAYAMA, Mitsuru SOMETANI, Yoshiyuki YONEZAWA, Yuji KIUCHI
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Patent number: 11152224Abstract: First and second n-type field stop layers in an n? drift region come into contact with a p+ collector layer. The first n-type field stop layer has an impurity concentration reduced toward an n+ emitter region at a steep gradient. The second n-type field stop layer has an impurity concentration distribution in which impurity concentration is reduced toward the n+ emitter region at a gentler gradient than that in the first n-type field stop layer and the impurity concentration of a peak position is less than that in the impurity concentration distribution of the first n-type field stop layer. The impurity concentration distributions of the first and second n-type field stop layers have the same peak position. The first and second n-type field stop layers are formed using annealing and first and second proton irradiation processes which have the same projected range and different acceleration energy levels.Type: GrantFiled: March 15, 2013Date of Patent: October 19, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tomonori Mizushima
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Patent number: 10720330Abstract: A semiconductor device includes: a first-conductivity-type drift layer including a first-conductivity-type impurity, vacancy-oxygen-hydrogen complex defects each caused by a vacancy, an oxygen atom, and a hydrogen atom, divacancy-and-vacancy-phosphorus complex defects, having a trap density level lower than a trap density level of the vacancy-oxygen-hydrogen complex defect, and third complex defects; a plurality of donor layers provided at different depths in a depth direction of the first-conductivity-type drift layer, wherein each of the plurality of donor layers includes donors caused by the vacancy-oxygen-hydrogen complex defects, and each of the plurality of donor layers has an impurity concentration distribution that includes a first portion with a maximum impurity concentration and a second portion with a concentration gradient in which the impurity concentration is reduced from the first portion to both main surfaces of the first-conductivity-type drift layer; and a second-conductivity-type semiconducType: GrantFiled: July 31, 2018Date of Patent: July 21, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tomonori Mizushima, Yusuke Kobayashi
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Patent number: 10204979Abstract: A semiconductor device is disclosed. In a surface layer of a front surface of an n-type semiconductor substrate, an anode layer is provided in an element activation portion and an annular p-type guard ring and an n-type high-concentration surface region are provided in an annular termination breakdown voltage region which surrounds the outer circumference of the anode layer. The impurity concentration of the n-type high-concentration surface region is higher than that of the semiconductor substrate and is lower than that of the p-type guard ring. The depth of the n-type high-concentration surface region is less than that of the guard ring. The anode layer and the guard ring are formed while the oxygen concentration of the semiconductor substrate is set to be equal to or more than 1×1016/cm3 and equal to or less than 1×1018/cm3.Type: GrantFiled: January 13, 2017Date of Patent: February 12, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tomonori Mizushima
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Publication number: 20180337050Abstract: A semiconductor device includes: a first-conductivity-type drift layer including a first-conductivity-type impurity, vacancy-oxygen-hydrogen complex defects each caused by a vacancy, an oxygen atom, and a hydrogen atom, divacancy-and-vacancy-phosphorus complex defects, having a trap density level lower than a trap density level of the vacancy-oxygen-hydrogen complex defect, and third complex defects; a plurality of donor layers provided at different depths in a depth direction of the first-conductivity-type drift layer, wherein each of the plurality of donor layers includes donors caused by the vacancy-oxygen-hydrogen complex defects, and each of the plurality of donor layers has an impurity concentration distribution that includes a first portion with a maximum impurity concentration and a second portion with a concentration gradient in which the impurity concentration is reduced from the first portion to both main surfaces of the first-conductivity-type drift layer; and a second-conductivity-type semiconducType: ApplicationFiled: July 31, 2018Publication date: November 22, 2018Applicant: FUJI ELECTRIC CO., LTD.Inventors: Tomonori MIZUSHIMA, Yusuke Kobayashi
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Patent number: 10049880Abstract: A method of manufacturing a semiconductor device, where the device includes a donor layer that is obtained by changing a crystal defect formed in a first-conduction-type drift layer by proton radiation into a donor and in which the donor layer has an impurity concentration distribution including a first portion with a maximum impurity concentration and a second portion with a concentration gradient in which the impurity concentration is reduced from the first portion to both surfaces of the first-conduction-type drift layer. The method includes performing proton radiation for a first-conduction-type semiconductor substrate which will be the first-conduction-type drift layer to form a crystal defect in the first-conduction-type semiconductor substrate; and performing a heat treatment at a temperature equal to or higher than 300° C. and equal to or lower than 450° for one minute to 300 minutes to change the crystal defect into a donor.Type: GrantFiled: August 11, 2016Date of Patent: August 14, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tomonori Mizushima, Yusuke Kobayashi
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Patent number: 9685446Abstract: A method of manufacturing a semiconductor device includes preparing a light ion source, a first mask and a second mask. A side of a first region on a top surface of a semiconductor substrate is shielded by using the first mask. The top surface, with the side of the first region thereon being shielded with the first mask, is irradiated with light ions by operating the light ion source to introduce lattice defects at a specified depth on a side of a second region on the top surface. A side of the second region on a bottom surface of the semiconductor substrate is shielded by using the second mask. The bottom surface, with the side of the second region thereon being shielded with the second mask, is irradiated with light ions by operating the light ion source to introduce lattice defects at a specified depth on the side of the first region on the bottom surface.Type: GrantFiled: May 6, 2016Date of Patent: June 20, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tomonori Mizushima
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Publication number: 20170133454Abstract: A semiconductor device is disclosed. In a surface layer of a front surface of an n-type semiconductor substrate, an anode layer is provided in an element activation portion and an annular p-type guard ring and an n-type high-concentration surface region are provided in an annular termination breakdown voltage region which surrounds the outer circumference of the anode layer. The impurity concentration of the n-type high-concentration surface region is higher than that of the semiconductor substrate and is lower than that of the p-type guard ring. The depth of the n-type high-concentration surface region is less than that of the guard ring. The anode layer and the guard ring are formed while the oxygen concentration of the semiconductor substrate is set to be equal to or more than 1×1016/cm3 and equal to or less than 1×1018/cm3.Type: ApplicationFiled: January 13, 2017Publication date: May 11, 2017Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tomonori MIZUSHIMA
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Patent number: 9570541Abstract: A semiconductor device is disclosed. In a surface layer of a front surface of an n-type semiconductor substrate, an anode layer is provided in an element activation portion and an annular p-type guard ring and an n-type high-concentration surface region are provided in an annular termination breakdown voltage region which surrounds the outer circumference of the anode layer. The impurity concentration of the n-type high-concentration surface region is higher than that of the semiconductor substrate and is lower than that of the p-type guard ring. The depth of the n-type high-concentration surface region is less than that of the guard ring. The anode layer and the guard ring are formed while the oxygen concentration of the semiconductor substrate is set to be equal to or more than 1×1016/cm3 and equal to or less than 1×1018/cm3.Type: GrantFiled: December 15, 2011Date of Patent: February 14, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tomonori Mizushima
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Publication number: 20160351400Abstract: A method of manufacturing a semiconductor device, where the device includes a donor layer that is obtained by changing a crystal defect formed in a first-conduction-type drift layer by proton radiation into a donor and in which the donor layer has an impurity concentration distribution including a first portion with a maximum impurity concentration and a second portion with a concentration gradient in which the impurity concentration is reduced from the first portion to both surfaces of the first-conduction-type drift layer. The method includes performing proton radiation for a first-conduction-type semiconductor substrate which will be the first-conduction-type drift layer to form a crystal defect in the first-conduction-type semiconductor substrate; and performing a heat treatment at a temperature equal to or higher than 300° C. and equal to or lower than 450° for one minute to 300 minutes to change the crystal defect into a donor.Type: ApplicationFiled: August 11, 2016Publication date: December 1, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Tomonori Mizushima, Yusuke Kobayashi
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Patent number: 9443774Abstract: A donor layer that is formed by performing a heat treatment for a crystal defect formed by proton radiation is provided in an n-type drift layer of an n? semiconductor substrate. The donor layer has an impurity concentration distribution including a portion with the maximum impurity concentration and a portion with a concentration gradient in which the impurity concentration is reduce to the same impurity concentration as that of the n-type drift layer in a direction from the portion with the maximum impurity concentration to both surfaces of the n-type drift layer. The crystal defect formed in the n-type drift layer is a composite crystal defect mainly caused by a vacancy, oxygen, and hydrogen.Type: GrantFiled: April 8, 2014Date of Patent: September 13, 2016Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tomonori Mizushima, Yusuke Kobayashi
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Publication number: 20160254264Abstract: A method of manufacturing a semiconductor device includes preparing a light ion source, a first mask and a second mask. A side of a first region on a top surface of a semiconductor substrate is shielded by using the first mask. The top surface, with the side of the first region thereon being shielded with the first mask, is irradiated with light ions by operating the light ion source to introduce lattice defects at a specified depth on a side of a second region on the top surface. A side of the second region on a bottom surface of the semiconductor substrate is shielded by using the second mask. The bottom surface, with the side of the second region thereon being shielded with the second mask, is irradiated with light ions by operating the light ion source to introduce lattice defects at a specified depth on the side of the first region on the bottom surface.Type: ApplicationFiled: May 6, 2016Publication date: September 1, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tomonori MIZUSHIMA
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Patent number: 9356115Abstract: A method of manufacturing an RC-IGBT provided with an IGBT and an FWD on the same substrate is provided. First, top surface device structures of an IGBT and an FWD are formed on the top surface of a semiconductor substrate. Then, with the side of an IGBT region on the top surface of the semiconductor substrate shielded by a first shielding mask, only an FWD region is irradiated with light ions. Next, with the side of the FWD region on the bottom surface of the semiconductor substrate shielded by a second shielding mask, only the IGBT region is irradiated with light ions. With this, a first lifetime control region 10-1 is formed on the collector side A2 in the IGBT region A1-A2 and a second lifetime control region 10-2 is formed on the anode side B1 of the FWD region B1-B2.Type: GrantFiled: March 17, 2013Date of Patent: May 31, 2016Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tomonori Mizushima
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Publication number: 20150069462Abstract: First and second n-type field stop layers in an n? drift region come into contact with a p+ collector layer. The first n-type field stop layer has an impurity concentration reduced toward an n+ emitter region at a steep gradient. The second n-type field stop layer has an impurity concentration distribution in which impurity concentration is reduced toward the n+ emitter region at a gentler gradient than that in the first n-type field stop layer and the impurity concentration of a peak position is less than that in the impurity concentration distribution of the first n-type field stop layer. The impurity concentration distributions of the first and second n-type field stop layers have the same peak position. The first and second n-type field stop layers are formed using annealing and first and second proton irradiation processes which have the same projected range and different acceleration energy levels.Type: ApplicationFiled: March 15, 2013Publication date: March 12, 2015Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tomonori Mizushima
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Patent number: 8957461Abstract: A TMBS diode is disclosed. In an active portion and voltage withstanding structure portion of the diode, an end portion trench surrounds active portion trenches. An active end portion which is an outer circumferential side end portion of an anode electrode is in contact with conductive polysilicon inside the end portion trench. A guard trench is separated from the end portion trench and surrounds it. A field plate provided on an outer circumferential portion of the anode electrode is separated from the anode electrode, and contacts both part of a surface of n-type drift layer in a mesa region between the end portion trench and the guard trench and the conductive polysilicon formed inside the guard trench. The semiconductor device has high withstand voltage without injection of minority carriers, and relaxed electric field intensity of the trench formed in an end portion of an active portion.Type: GrantFiled: July 29, 2013Date of Patent: February 17, 2015Assignee: Fuji Electric Co., Ltd.Inventors: Tomonori Mizushima, Michio Nemoto
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Patent number: 8841697Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes forming a first trench and a second trench in an n-type substrate surface, the first trenches being spaced apart from each other, the second trench surrounding the first trenches, the second trench being wider than the first trench. The method also includes forming a gate oxide film on the inner surfaces of the first and second trenches, and depositing an electrically conductive material to the thickness a half or more as large as the first trench width. The method further includes removing the electrically conductive material using the gate oxide film as a stopper layer, forming an insulator film thicker than the gate oxide film, and polishing the insulator film by CMP for exposing the n-type substrate and the electrically conductive material in the first trench.Type: GrantFiled: June 24, 2013Date of Patent: September 23, 2014Assignee: Fuji Electric Co., Ltd.Inventor: Tomonori Mizushima
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Publication number: 20140217407Abstract: A donor layer that is formed by performing a heat treatment for a crystal defect formed by proton radiation is provided in an n-type drift layer of an n? semiconductor substrate. The donor layer has an impurity concentration distribution including a portion with the maximum impurity concentration and a portion with a concentration gradient in which the impurity concentration is reduce to the same impurity concentration as that of the n-type drift layer in a direction from the portion with the maximum impurity concentration to both surfaces of the n-type drift layer. The crystal defect formed in the n-type drift layer is a composite crystal defect mainly caused by a vacancy, oxygen, and hydrogen.Type: ApplicationFiled: April 8, 2014Publication date: August 7, 2014Applicant: FUJI ELECTRIC CO., LTDInventors: Tomonori Mizushima, Yusuke Kobayashi
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Publication number: 20130313676Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes forming a first trench and a second trench in an n-type substrate surface, the first trenches being spaced apart from each other, the second trench surrounding the first trenches, the second trench being wider than the first trench. The method also includes forming a gate oxide film on the inner surfaces of the first and second trenches, and depositing an electrically conductive material to the thickness a half or more as large as the first trench width. The method further includes removing the electrically conductive material using the gate oxide film as a stopper layer, forming an insulator film thicker than the gate oxide film, and polishing the insulator film by CMP for exposing the n-type substrate and the electrically conductive material in the first trench.Type: ApplicationFiled: June 24, 2013Publication date: November 28, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tomonori MIZUSHIMA
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Publication number: 20130307111Abstract: A TMBS diode is disclosed. In an active portion and voltage withstanding structure portion of the diode, an end portion trench surrounds active portion trenches. An active end portion which is an outer circumferential side end portion of an anode electrode is in contact with conductive polysilicon inside the end portion trench. A guard trench is separated from the end portion trench and surrounds it. A field plate provided on an outer circumferential portion of the anode electrode is separated from the anode electrode, and contacts both part of a surface of n-type drift layer in a mesa region between the end portion trench and the guard trench and the conductive polysilicon formed inside the guard trench. The semiconductor device has high withstand voltage without injection of minority carriers, and relaxed electric field intensity of the trench formed in an end portion of an active portion.Type: ApplicationFiled: July 29, 2013Publication date: November 21, 2013Applicant: Fuji Electric Co., Ltd.Inventors: Tomonori MIZUSHIMA, Michio NEMOTO