Patents by Inventor Tomonori Shinoda
Tomonori Shinoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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AUXILIARY POWER SUPPLY UNIT, METHOD FOR CONTROLLING AUXILIARY POWER SUPPLY UNIT, AND STEERING SYSTEM
Publication number: 20240124050Abstract: An auxiliary power supply unit includes an auxiliary power supply device and a downstream power supply line group connecting the auxiliary power supply device to motor units. The auxiliary power supply device includes: an auxiliary power supply provided on a power supply path; and a switching circuit configured to switch the connection state of the auxiliary power supply to the power supply path. The connection state of the auxiliary power supply includes a boost state in which the auxiliary power supply is connected in series with the external power supply. The downstream power supply line group includes branch first downstream drive lines and branch second downstream drive lines. Each of the upstream ends of the branch first downstream drive lines and the branch second downstream drive lines is connected to the power supply path at a position downstream of the auxiliary power supply.Type: ApplicationFiled: March 19, 2021Publication date: April 18, 2024Applicant: JTEKT CORPORATIONInventors: Tomonori TOTOUMI, Takumi MIO, Fumihiko SATO, Satoshi SHINODA, Hiroki NITTA, Kouhei OTA -
Patent number: 9786541Abstract: A dicing sheet with a protective film forming layer has a substrate film, an adhesive layer, and a protective film forming layer, and at a minimum, the adhesive layer is formed in an area surrounding the protective film forming layer in a planar view, and the substrate film has the following characteristics (a)-(c): (a) the melting point either exceeds 130° C. or the film has no melting point; (b) the thermal contraction rate under conditions of heating at 130° C. for two hours is from ?5 to +5%, and (c) the degree of elongation-to-break in the MD direction and the CD direction is at least 100%, and the stress at 25% is no more than 100 MPa.Type: GrantFiled: September 27, 2012Date of Patent: October 10, 2017Assignee: LINTEC CorporationInventors: Tomonori Shinoda, Masaaki Furudate, Ken Takano
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Patent number: 9754811Abstract: [Problem] To provide a dicing sheet that is with a protective film formation layer, can easily produce a semiconductor chip having a protective film having high uniformity and superior printing precision, is such that the peeling of the protective film and the dicing sheet can be easily performed, and has superior affixing ability of chips during dicing. [Solution] The dicing sheet with a protective film formation layer is characterized by a protective film formation layer being peelably provided on the adhesive layer of an adhesive sheet resulting from the adhesive layer, which contains an adhesive component and a free epoxy group-containing compound, being laminated onto a substrate film.Type: GrantFiled: August 22, 2013Date of Patent: September 5, 2017Assignee: LINTEC CORPORATIONInventors: Naoya Saeki, Tomonori Shinoda, Ken Takano
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Patent number: 9443750Abstract: A dicing sheet with a protective film-forming layer includes a protective film-forming layer on an adhesive layer of an adhesive sheet with a peel strength adjusting layer being interposed therebetween. The adhesive sheet is composed of a base film and the adhesive layer. The dicing sheet with a protective film-forming layer may also include a laminate of the peel strength adjusting layer and the protective film-forming layer arranged in the inner circumferential part of the adhesive sheet; the adhesive layer is exposed in the outer circumferential part of the adhesive sheet; and the peel strength between the peel strength adjusting layer and a protective film that is obtained by curing the protective film-forming layer is 0.05-5 N/25 mm.Type: GrantFiled: December 25, 2012Date of Patent: September 13, 2016Assignee: LINTEC CorporationInventors: Tomonori Shinoda, Ken Takano
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Publication number: 20150228526Abstract: [Problem] To provide a dicing sheet that is with a protective film formation layer, can easily produce a semiconductor chip having a protective film having high uniformity and superior printing precision, is such that the peeling of the protective film and the dicing sheet can be easily performed, and has superior affixing ability of chips during dicing. [Solution] The dicing sheet with a protective film formation layer is characterized by a protective film formation layer being peelably provided on the adhesive layer of an adhesive sheet resulting from the adhesive layer, which contains an adhesive component and a free epoxy group-containing compound, being laminated onto a substrate film.Type: ApplicationFiled: August 22, 2013Publication date: August 13, 2015Applicant: LINTEC CORPORATIONInventors: Naoya Saeki, Tomonori Shinoda, Ken Takano
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Publication number: 20150024576Abstract: A dicing sheet with a protective film-forming layer includes a protective film-forming layer on an adhesive layer of an adhesive sheet with a peel strength adjusting layer being interposed therebetween. The adhesive sheet is composed of a base film and the adhesive layer. The dicing sheet with a protective film-forming layer may also include a laminate of the peel strength adjusting layer and the protective film-forming layer is arranged in the inner circumferential part of the adhesive sheet; the adhesive layer is exposed in the outer circumferential part of the adhesive sheet; and the peel strength between the peel strength adjusting layer and a protective film that is obtained by curing the protective film-forming layer is 0.05-5 N/25 mm.Type: ApplicationFiled: December 25, 2012Publication date: January 22, 2015Inventors: Tomonori Shinoda, Ken Takano
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Publication number: 20140295646Abstract: A dicing sheet with a protective film forming layer has a substrate film, an adhesive layer, and a protective film forming layer, and at a minimum, the adhesive layer is formed in an area surrounding the protective film forming layer in a planar view, and the substrate film has the following characteristics (a)-(c): (a) the melting point either exceeds 130° C. or the film has no melting point; (b) the thermal contraction rate under conditions of heating at 130° C. for two hours is from ?5 to +5%, and (c) the degree of elongation-to-break in the MD direction and the CD direction is at least 100%, and the stress at 25% is no more than 100 MPa.Type: ApplicationFiled: September 27, 2012Publication date: October 2, 2014Inventors: Tomonori Shinoda, Masaaki Furudate, Ken Takano
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Patent number: 8735881Abstract: A sheet for forming a resin film for a chip, with which a semiconductor device is provided with a gettering function, is obtained without performing special treatment to a semiconductor wafer and the chip. The sheet has a release sheet, and a resin film-forming layer, which is formed on the releasing face of the release sheet, and the resin film-forming layer contains a binder polymer component, a curing component, and a gettering agent.Type: GrantFiled: January 24, 2014Date of Patent: May 27, 2014Assignee: LINTEC CorporationInventors: Tomonori Shinoda, Yoji Wakayama
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Publication number: 20140141570Abstract: A sheet for forming a resin film for a chip, with which a semiconductor device is provided with a gettering function, is obtained without performing special treatment to a semiconductor wafer and the chip. The sheet has a release sheet, and a resin film-forming layer, which is formed on the releasing face of the release sheet, and the resin film-forming layer contains a binder polymer component, a curing component, and a gettering agent.Type: ApplicationFiled: January 24, 2014Publication date: May 22, 2014Applicant: LINTEC CorporationInventors: Tomonori Shinoda, Yoji Wakayama
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Patent number: 8674349Abstract: A sheet for forming a resin film for a chip, with which a semiconductor device is provided with a gettering function, is obtained without performing special treatment to a semiconductor wafer and the chip. The sheet has a release sheet, and a resin film-forming layer, which is formed on the releasing face of the release sheet, and the resin film-forming layer contains a binder polymer component, a curing component, and a gettering agent.Type: GrantFiled: March 30, 2011Date of Patent: March 18, 2014Assignee: Lintec CorporationInventors: Tomonori Shinoda, Yoji Wakayama
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Publication number: 20130011998Abstract: A sheet for forming a resin film for a chip, with which a semiconductor device is provided with a gettering function, is obtained without performing special treatment to a semiconductor wafer and the chip. The sheet has a release sheet, and a resin film-forming layer, which is formed on the releasing face of the release sheet, and the resin film-forming layer contains a binder polymer component, a curing component, and a gettering agent.Type: ApplicationFiled: March 30, 2011Publication date: January 10, 2013Applicant: LINTEC CORPORATIONInventors: Tomonori Shinoda, Yoji Wakayama
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Patent number: 8034667Abstract: A semiconductor sealing resin sheet is composed of a supporting sheet and a sealing resin layer releasably laminated on the supporting sheet, wherein the sealing resin layer has a thermosetting property, the elastic modulus of the sealing resin layer before thermosetting is 1.0×103 to 1.0×104 Pa, the melt viscosity 120° C. of the sealing resin layer before thermosetting is 100 to 200 Pa·s, and the time required for the melt viscosity to reach its minimum value is 60 sec or less when the sealing resin layer before thermosetting is kept at a constant temperature of 120° C.Type: GrantFiled: May 26, 2005Date of Patent: October 11, 2011Assignee: Lintec CorporationInventors: Tomonori Shinoda, Osamu Yamazaki
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Patent number: 7935574Abstract: The invention provides a marking method in which marking is performed on a protective film formed on a work with a high accuracy while suppressing a warpage and, also, a sheet for both protective film forming and dicing which is advantageously used in the method. The marking method comprises irradiating laser light to a laminated structure comprising a support film tensely supported by a ring frame, a protective film releasably laminated on the support film and a work fixed to the protective film, wherein the protective film is irradiated laser light from a side of the support film, to thereby mark the protective film.Type: GrantFiled: November 10, 2005Date of Patent: May 3, 2011Assignee: Lintec CorporationInventors: Naoya Saiki, Tomonori Shinoda, Akie Hamasaki
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Publication number: 20100090323Abstract: The present invention provides a spacer sheet for a complex type semiconductor device provided between the semiconductor packages of a complex type semiconductor device formed by laminating plural semiconductor packages, comprising through holes of an array corresponding to electrodes which can be provided onto a substrate of one semiconductor package and which are formed in order to connect and wire one semiconductor package with the other semiconductor package and a space part corresponding to a principal part of the above one semiconductor package mounted on the substrate or a principal part of the other semiconductor package opposed to the substrate and a production process for a complex type semiconductor device in which the above spacer sheet is used.Type: ApplicationFiled: October 22, 2007Publication date: April 15, 2010Applicant: Lintec CorporationInventors: Tomonori Shinoda, Hironori Shizuhata, Hirofumi Shinoda, Yuji Kawamata, Takeshi Tashima, Masato Shimamura, Masako Watanabe, Masazumi Amagai
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Publication number: 20100025837Abstract: The present invention relates to a complex type semiconductor device formed by laminating plural semiconductor packages, wherein it comprises: an upper semiconductor package which comprises a substrate for wiring and connecting provided with electrodes for conducting packages on a lower surface in the upper semiconductor package and a principal part of the upper semiconductor package disposed on an upper surface and/or a lower surface of the above substrate and which constitutes a relatively upper part, a lower semiconductor package which comprises a substrate for wiring and connecting provided with electrodes for conducting packages on an upper surface in the lower semiconductor package and a principal part of the lower semiconductor package disposed on an upper surface and/or a lower surface of the above substrate and which constitutes a relatively lower part, a spacer sheet which comprises a space part corresponding to the principal part of the upper semiconductor package and/or the principal part of thType: ApplicationFiled: October 22, 2007Publication date: February 4, 2010Applicant: LINTEC CORPORATIONInventors: Tomonori Shinoda, Hironori Shizuhata, Hirofumi Shinoda, Yuji Kawamata, Takeshi Tashima, Masato Shimamura, Masako Watanabe, Masazumi Amagai
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Publication number: 20090053518Abstract: Described is a sheet for forming a protective film, which can be used suitably in a process where marking is made on the protective film formed on work such as a wafer and the like. The sheet includes a release sheet and a protective film forming layer provided on the release surface of the release sheet, wherein the protective film forming layer includes 100 parts by weight of an epoxy resin, 50 to 200 parts by weight of a binder polymer, and 100 to 2,000 parts by weight of fillers, 30% by weight or more of total 100% by weight of the said epoxy resin being selected from epoxy resins represented by the following formulae (I) and (II); wherein, X's are —O—, —OCH(CH3)O— and the like; R's are a polyether skeleton and the like; and n's are in the range of 1 to 10.Type: ApplicationFiled: March 23, 2007Publication date: February 26, 2009Applicant: LINTEC CORPORATIONInventors: Naoya Saiki, Tomonori Shinoda, Osamu Yamazaki
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Publication number: 20070254410Abstract: A semiconductor sealing resin sheet is composed of a supporting sheet and a sealing resin layer releasably laminated on the supporting sheet, wherein the sealing resin layer has a thermosetting property, the elastic modulus of the sealing resin layer before thermosetting is 1.0×103 to 1.0×104 Pa, the melt viscosity 120° C. of the sealing resin layer before thermosetting is 100 to 200 Pa·s, and the time required for the melt viscosity to reach its minimum value is 60 sec or less when the sealing resin layer before thermosetting is kept at a constant temperature of 120° C.Type: ApplicationFiled: May 26, 2005Publication date: November 1, 2007Applicant: Lintec CorporationInventors: Tomonori Shinoda, Osamu Yamazaki
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Patent number: 7135358Abstract: There is disclosed a process for producing a resin-sealed type electronic device which comprises forming a dam frame on edge and side portions of a substrate loaded with a single or a plurality of electronic elements so as to encompass the electronic elements by sticking down a pressure sensitive adhesive sheet to the substrate, pouring a resin for sealing in the inside of the dam frame, and heat-curing the poured resin. The process dispenses with an intricate production step or a long time in forming the dam frame, thus enabling forming of the same with a minimized number of production steps and in the shortest amount of time possible.Type: GrantFiled: September 24, 2004Date of Patent: November 14, 2006Assignee: Lintec CorporationInventors: Takashi Sugino, Tomonori Shinoda
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Publication number: 20060102987Abstract: The invention provides a marking method in which marking is performed on a protective film formed on a work with a high accuracy while suppressing a warpage and, also, a sheet for both protective film forming and dicing which is advantageously used in the method. The marking method comprises irradiating laser light to a laminated structure comprising a support film tensely supported by a ring frame, a protective film releasably laminated on the support film and a work fixed to the protective film, wherein the protective film is irradiated laser light from a side of the support film, to thereby mark the protective film.Type: ApplicationFiled: November 12, 2005Publication date: May 18, 2006Applicant: Lintec CorporationInventors: Naoya Saiki, Tomonori Shinoda, Akie Hamasaki
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Publication number: 20050074922Abstract: There is disclosed a process for producing a resin-sealed type electronic device which comprises forming a dam frame on edge and side portions of a substrate loaded with a single or a plurality of electronic elements so as to encompass the electronic elements by sticking down a pressure sensitive adhesive sheet to the substrate, pouring a resin for sealing in the inside of the dam frame, and heat-curing the poured resin. The process dispenses with intricate production step or a long time in forming the dam frame, thus enabling to form the same with minimized number of production steps and shortest time.Type: ApplicationFiled: September 24, 2004Publication date: April 7, 2005Applicant: LINTEC CORPORATIONInventors: Takashi Sugino, Tomonori Shinoda