Patents by Inventor Tomoya Sasago

Tomoya Sasago has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088174
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Patent number: 11855106
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: December 26, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Patent number: 11818483
    Abstract: A photoelectric conversion device includes a plurality of pixels each including an avalanche diode, a quench unit reducing the avalanche multiplication of the avalanche diode, a pulse conversion unit converting an output signal of the avalanche diode into pulses, and a signal generation unit generating an accumulation signal obtained by accumulating the number of pulses, a detection unit detecting whether or not the width of the pulse is not smaller than a predetermined width, and a voltage control unit controlling a reverse bias voltage applied to the avalanche diode within a range not lower than the breakdown voltage of the avalanche diode based on the result of the detection. The voltage control unit lowers the reverse bias voltage within a range not lower than the breakdown voltage when the accumulation value of pixels whose pulse width is not smaller than a predetermined width is not smaller than a predetermined value.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: November 14, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Patent number: 11411028
    Abstract: A photoelectric conversion apparatus includes a first diode which is an avalanche multiplication-type and a second diode which is an avalanche multiplication-type formed within a semiconductor substrate, a first transistor forming a first quench element, and a second transistor forming a second quench element. The first transistor and the second transistor are disposed between the first diode and the second diode in a planar view. The first transistor and the second transistor are disposed in a common semiconductor well region formed within the semiconductor substrate.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 9, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Publication number: 20220238574
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Application
    Filed: January 18, 2022
    Publication date: July 28, 2022
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Publication number: 20220239857
    Abstract: The photoelectric conversion device includes a pixel. The pixel includes a photoelectric conversion unit and a signal processing circuit. The photoelectric conversion unit includes an avalanche diode that multiplies charge generated by an incident of photon by avalanche multiplication, and outputting a first signal in accordance with the incident of photon. The signal processing circuit includes a logic circuit that outputs a third signal in response to the first signal and a second signal. The signal processing circuit includes a first element having a first withstand voltage and a second element having a second withstand voltage lower than the first withstand voltage, and is configured such that the first signal is input to the first element and the second signal is input to the second element.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 28, 2022
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Publication number: 20220238589
    Abstract: The wiring is configured so that both ends of a region including each of a plurality of pixel circuits in a first direction and both ends of the region in a second direction intersecting the first direction are connected by a combination of a wiring layer group.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 28, 2022
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Patent number: 11362231
    Abstract: An avalanche diode includes a first semiconductor region of a first conductivity type disposed in a first depth, a second semiconductor region disposed in a second depth deeper than the first depth with respect to a first surface, in contact with the first semiconductor region, and a third semiconductor region disposed in a third depth deeper than the second depth with respect to the first surface, in contact with the second semiconductor region. Avalanche multiplication is caused by the first and third semiconductor regions. The first, second, and third semiconductor regions overlap in plan view. A potential difference between the first and second semiconductor regions with respect to main charge carriers of a semiconductor region of the first conductive type is smaller than a potential difference between the first and third semiconductor regions with respect to the charge carriers.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: June 14, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Junji Iwata
  • Publication number: 20220014698
    Abstract: A photoelectric conversion device includes a plurality of pixels each including an avalanche diode, a quench unit reducing the avalanche multiplication of the avalanche diode, a pulse conversion unit converting an output signal of the avalanche diode into pulses, and a signal generation unit generating an accumulation signal obtained by accumulating the number of pulses, a detection unit detecting whether or not the width of the pulse is not smaller than a predetermined width, and a voltage control unit controlling a reverse bias voltage applied to the avalanche diode within a range not lower than the breakdown voltage of the avalanche diode based on the result of the detection. The voltage control unit lowers the reverse bias voltage within a range not lower than the breakdown voltage when the accumulation value of pixels whose pulse width is not smaller than a predetermined width is not smaller than a predetermined value.
    Type: Application
    Filed: June 29, 2021
    Publication date: January 13, 2022
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Publication number: 20200273895
    Abstract: A photoelectric conversion apparatus includes a first diode which is an avalanche multiplication-type and a second diode which is an avalanche multiplication-type formed within a semiconductor substrate, a first transistor forming a first quench element, and a second transistor forming a second quench element. The first transistor and the second transistor are disposed between the first diode and the second diode in a planar view. The first transistor and the second transistor are disposed in a common semiconductor well region formed within the semiconductor substrate.
    Type: Application
    Filed: February 20, 2020
    Publication date: August 27, 2020
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Patent number: 10734422
    Abstract: There is provided a semiconductor apparatus including a first semiconductor region of a first conductive type in which a potential to be detected appears, a second semiconductor region of a second conductive type forming a p-n junction with the first semiconductor region, an amplification transistor including a gate to which the first semiconductor region is connected, and a reset transistor configured to reset a potential of the first semiconductor region. In the semiconductor apparatus, one of a source and a drain of the reset transistor is connected to the first semiconductor region, and the other one of the source and the drain of the reset transistor is connected to the second semiconductor region.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: August 4, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Kazuaki Tashiro
  • Publication number: 20200105958
    Abstract: An avalanche diode includes a first semiconductor region of a first conductivity type disposed in a first depth, a second semiconductor region disposed in a second depth deeper than the first depth with respect to a first surface, in contact with the first semiconductor region, and a third semiconductor region disposed in a third depth deeper than the second depth with respect to the first surface, in contact with the second semiconductor region. Avalanche multiplication is caused by the first and third semiconductor regions. The first, second, and third semiconductor regions overlap in plan view. A potential difference between the first and second semiconductor regions with respect to main charge carriers of a semiconductor region of the first conductive type is smaller than a potential difference between the first and third semiconductor regions with respect to the charge carriers.
    Type: Application
    Filed: September 16, 2019
    Publication date: April 2, 2020
    Inventors: Tomoya Sasago, Junji Iwata
  • Patent number: 10419695
    Abstract: Provided is a photoelectric conversion device including: a pixel array including a plurality of pixels each including a first electrode, a second electrode, and a photoelectric conversion layer arranged between the first and second electrodes, in which the pixels include a first pixel having a first color filter and a second pixel having a second color filter different from the first color filter; a potential supply line that supplies an electric potential to the first electrodes of the first pixel and the second pixel; and control lines configured to supply different electric potentials to the second electrodes of the first pixel and the second pixel, respectively, to compensate a difference between a dependency of a sensitivity of the first pixel on a bias voltage applied to the photoelectric conversion layer and a dependency of a sensitivity of the second pixel on a bias voltage applied to the photoelectric conversion layer.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: September 17, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Kazuaki Tashiro
  • Publication number: 20190221594
    Abstract: There is provided a semiconductor apparatus including a first semiconductor region of a first conductive type in which a potential to be detected appears, a second semiconductor region of a second conductive type forming a p-n junction with the first semiconductor region, an amplification transistor including a gate to which the first semiconductor region is connected, and a reset transistor configured to reset a potential of the first semiconductor region. In the semiconductor apparatus, one of a source and a drain of the reset transistor is connected to the first semiconductor region, and the other one of the source and the drain of the reset transistor is connected to the second semiconductor region.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 18, 2019
    Inventors: Tomoya Sasago, Kazuaki Tashiro
  • Publication number: 20180249104
    Abstract: Provided is a photoelectric conversion device including: a pixel array including a plurality of pixels each including a first electrode, a second electrode, and a photoelectric conversion layer arranged between the first and second electrodes, in which the pixels include a first pixel having a first color filter and a second pixel having a second color filter different from the first color filter; a potential supply line that supplies an electric potential to the first electrodes of the first pixel and the second pixel; and control lines configured to supply different electric potentials to the second electrodes of the first pixel and the second pixel, respectively, to compensate a difference between a dependency of a sensitivity of the first pixel on a bias voltage applied to the photoelectric conversion layer and a dependency of a sensitivity of the second pixel on a bias voltage applied to the photoelectric conversion layer.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 30, 2018
    Inventors: Tomoya Sasago, Kazuaki Tashiro