Abstract: An electrostatic separator separates conductive particles from raw materials includes: a container with a raw material layer; a gas dispersion plate at the bottom of the raw material layer; at least one vibrating body in the raw material layer flush with the gas dispersion plate or above it; a fluidization gas supplier introduced from the container bottom into the raw material layer flows upward through the gas dispersion plate; an upper electrode above the raw material layer; a lower electrode in the raw material layer, the lower electrode being flush with the gas dispersion plate or above it; a power supply applies a voltage between the upper and lower electrode wherein one becomes a negative electrode, the other becomes a positive electrode, and an electric field is generated between them; and a capturer captures conductive particles that have flown out of the raw material layer surface toward the upper electrode.

Abstract: An electrostatic separation method includes: applying voltage between a lower electrode at a bottom portion of or in the raw material layer and an upper electrode above the raw material layer, generating an electric field between electrodes; fluidizing the raw material layer and bringing conductive particles and the lower electrode into contact in the raw material layer charging only the conductive particles wherein their polarity becomes the same as the lower electrode; generating polarity, the same as the upper electrode, by dielectric polarization on a conveyor belt downward-facing conveyance surface passing through a capture region above the raw material layer and under the upper electrode, the conveyance surface including a nonconductor; separates charged conductive particles from the raw material layer surface by electrostatic force and adhering conductive particles to the conveyor belt conveyance surface; and separating and collecting the particles from the conveyance surface that moved outside the ele

Abstract: In order to deal with suspicious aircraft, which are unmanned aircraft that are not authorized to fly in a surveillance airspace, while preventing adverse effects on authorized aircraft, which are unmanned aircraft that are authorized to fly in the surveillance airspace, this device for dealing with suspicious aircraft includes a detection unit and an instruction unit. The detection unit detects the intrusion of a suspicious aircraft into the surveillance airspace. When the intrusion of a suspicious aircraft into the surveillance airspace is detected, the instruction unit outputs an evacuation command to evacuate the authorized aircraft from an area where the suspicious aircraft is dealt with, containing the suspicious aircraft. The instruction unit also outputs a command to deal with the suspicious aircraft in the surveillance airspace after the authorized aircraft has evacuated from the area where the suspicious aircraft is dealt with.

Abstract: First, a correction area, which is a part of area where a second ink (typically, white ink) is to be ejected among the area on base material, is determined. Next, density data is corrected so that the second ink is ejected onto the correction area. Thereafter, actual printing on the base material is started. Then, the second ink is ejected onto the correction area, and a first ink (typically, color ink) is ejected onto the second ink that has been ejected onto the base material in the correction area.

Abstract: A wiring substrate includes a core substrate, and a build-up part formed on the core substrate and including insulating layers and conductor layers. The conductor layers include one or more conductor layers each having a first wiring and a second wiring such that the second wiring has a conductor thickness smaller than a conductor thickness of the first wiring and that a minimum value of a line width of a wiring pattern of the second wiring is smaller than a minimum value of a line width of a wiring pattern of the first wiring.

Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on a first surface of the board, a connector mounted on a second surface of the board on the opposite side with respect to the first surface, an optical element that converts an optical signal and an electrical signal and positioned on the opposite side with respect to the first surface such that the optical element is at least partially embedded in the board, a path that is formed in the board and electrically connects the logic IC on the first surface and the optical element on the opposite side with respect to the first surface, and an optical waveguide that is embedded on the opposite side with respect to the first surface and optically connects the connector on the second surface and the optical element on the opposite side with respect to the first surface.

Abstract: A method for manufacturing a wiring substrate includes forming a resin insulating layer on a first conductor layer such that the resin insulating layer covers the first conductor layer, applying a roughening treatment on a surface of the resin insulating layer on the opposite side with respect to the first conductor layer, forming an opening in the resin insulating layer after the roughening treatment on the surface of the resin insulating layer such that the opening penetrates through the resin insulating layer and exposes a portion of the first conductor layer, and forming a second conductor layer on the surface of the resin insulating layer such that the second conductor layer is formed in contact with the surface of the resin insulating layer and that a via conductor is formed in the opening of the resin insulating layer.

Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on the printed wiring board, a connector mounted on the printed wiring board, an optical element that is accommodated inside the printed wiring board and converts an optical signal to an electrical signal and/or the electrical signal to the optical signal, an optical waveguide formed between the optical element inside the printed wiring board and the connector on the printed wiring board such that the optical waveguide optically connects the optical element and the connector, and an electrical path formed between the optical element and the logic IC such that the electrical path connects the logic IC and the optical element and that a length of the electrical path is 1 mm or less.

Abstract: A printed wiring board includes resin insulating layers, and conductor layers laminated on the resin insulating layers, respectively. The conductor layers includes a conductor layer including a conductor circuit formed such that the conductor circuit has recesses each having a depth of 2.0 ?m or more and a bottom whose diameter is larger than a diameter of an opening part of a respective one of the recesses.

Abstract: A printed wiring board includes resin insulating layers, and conductor layers including a conductor layer such that the conductor layer includes a conductor circuit and that the conductor circuit has a surface index X/Y in a range of 1.00 to 2.20 where X is a length of an outer circumference of cross section of the conductor circuit, and Y is a length of an outer circumference of a reference quadrangle in the cross section of the conductor circuit. The reference quadrangle has a first reference line drawn with reference to bottom of deepest recess on first side, a second reference line is drawn with reference to bottom of deepest recess on second side, a third reference line is drawn with reference to bottom of deepest recess on third side, and a fourth reference line is drawn with reference to bottom of deepest recess on fourth side of the outer circumference.

Abstract: A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer.

Abstract: A wiring substrate includes a core substrate, and a build-up part formed on the core substrate and including insulating layers and conductor layers. The conductor layers include one or more conductor layers each having a first wiring and a second wiring such that the second wiring has a conductor thickness smaller than a conductor thickness of the first wiring and that a minimum value of a line width of a wiring pattern of the second wiring is smaller than a minimum value of a line width of a wiring pattern of the first wiring.

Abstract: A wiring substrate includes a multilayer core substrate including a core layer, core conductor layers, and core insulating layers, a first laminate formed on first surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material, and a second laminate formed on second surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material.

Abstract: A wiring substrate includes a substrate including conductor layers and core insulating layers, and a laminate including insulating layers and conductor layers such that the conductor layers include first layer including first line pattern. The laminate includes first strip line including the first pattern, a pair of interlayer insulating layers sandwiching the first pattern, and a pair of conductor layers sandwiching the interlayer layers, the conductor layers in the substrate include second layer including second line pattern such that the substrate includes second strip line including the second pattern, a pair of core insulating layers sandwiching the second pattern, and a pair of conductor layers sandwiching the core insulating layers, and the pair of core insulating layers is thicker than the pair of interlayer layers, the second pattern is thicker than the first pattern, and line width of the second pattern is larger than line width of the first pattern.

Abstract: A wiring substrate includes a multilayer core substrate including a core layer, core conductor layers, and core insulating layers, a first laminate formed on first surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material, and a second laminate formed on second surface of the substrate and including insulating layers and conductor layers such that each insulating layer includes resin without reinforcing material.

Abstract: A wiring substrate includes a substrate including conductor layers and core insulating layers, and a laminate including insulating layers and conductor layers such that the conductor layers include first layer including first line pattern. The laminate includes first strip line including the first pattern, a pair of interlayer insulating layers sandwiching the first pattern, and a pair of conductor layers sandwiching the interlayer layers, the conductor layers in the substrate include second layer including second line pattern such that the substrate includes second strip line including the second pattern, a pair of core insulating layers sandwiching the second pattern, and a pair of conductor layers sandwiching the core insulating layers, and the pair of core insulating layers is thicker than the pair of interlayer layers, the second pattern is thicker than the first pattern, and line width of the second pattern is larger than line width of the first pattern.

Abstract: A radiator chamber is provided in a top compartment of a package, whereas an engine is provided in a bottom compartment. Outside the package, a battery unit is attached to an external wall panel (e.g., lower panel) of the bottom compartment. The battery unit includes a dedicated unit ventilation fan and a unit ventilating section that introduces outside air into an enclosure of the battery unit. The enclosure has a lower portion thereof divided to accommodate a package ventilating section that ventilates the bottom compartment of the package. There is provided a detachable bottom compartment inspection window in the external wall panel below the battery unit.

Abstract: A package has its internal space divided into a top compartment and a bottom compartment. The bottom compartment contains the engine. The top compartment is further divided by a partition wall into a first top compartment (e.g., a radiator chamber) and a second top compartment (e.g., a device installation chamber). The partition wall has a spatial connection port. The second top compartment has an external wall panel (e.g., the rear, upper panel) located facing the spatial connection port, the external wall panel having a vent (e.g., a gallery) formed therethrough. There is provided a duct-shaped heatsink to deliver outside air introduced through the vent to the spatial connection port. Electric components, such as an inverter, are disposed directly on an external surface of the heatsink (on the top face).

Abstract: A wiring board includes electronic components, a multilayer core substrate including insulating layers and conductive layers such that the insulating layers include a central insulating layer in the center position of the core in the thickness direction, a first build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core, and a second build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core. The core has cavities accommodating the electronic components, respectively, and including a first cavity and a second cavity such that the first and second cavities have different lengths in the thickness direction and are penetrating through the central layer at centers of the first and second cavities in the thickness direction.

Abstract: A wiring board includes electronic components, a multilayer core substrate including insulating layers and conductive layers such that the insulating layers include a central insulating layer in the center position of the core in the thickness direction, a first build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core, and a second build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core. The core has cavities accommodating the electronic components, respectively, and including a first cavity and a second cavity such that the first and second cavities have different lengths in the thickness direction and are penetrating through the central layer at centers of the first and second cavities in the thickness direction.