Patents by Inventor Tomoyuki Irizumi

Tomoyuki Irizumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8487309
    Abstract: An exemplary aspect of the present invention is a thin film transistor including: a gate electrode formed on a substrate; a gate insulating film that includes a nitride film and covers the gate electrode; and a semiconductor layer that is disposed to be opposed to the gate electrode with the gate insulating film interposed therebetween, and has a microcrystalline semiconductor layer formed in at least an interface in contact with the nitride film, in which the microcrystalline semiconductor layer contains oxygen at a concentration higher than that of contained nitrogen in at least the vicinity of the interface with the nitride film, the nitrogen being diffused from the nitride film.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: July 16, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Koji Oda, Tomoyuki Irizumi, Naoki Nakagawa, Takeshi Ono
  • Patent number: 8080450
    Abstract: On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength ?, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (?/n)×0.95 to (?/n)×1.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: December 20, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuyuki Sugahara, Naoki Nakagawa, Shinsuke Yura, Toru Takeguchi, Tomoyuki Irizumi, Kazushi Yamayoshi, Atsuhiro Sono
  • Publication number: 20110198606
    Abstract: An exemplary aspect of the present invention is a thin film transistor including: a gate electrode formed on a substrate; a gate insulating film that includes a nitride film and covers the gate electrode; and a semiconductor layer that is disposed to be opposed to the gate electrode with the gate insulating film interposed therebetween, and has a microcrystalline semiconductor layer formed in at least an interface in contact with the nitride film, in which the microcrystalline semiconductor layer contains oxygen at a concentration higher than that of contained nitrogen in at least the vicinity of the interface with the nitride film, the nitrogen being diffused from the nitride film.
    Type: Application
    Filed: January 20, 2011
    Publication date: August 18, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Koji Oda, Tomoyuki Irizumi, Naoki Nakagawa, Takeshi Ono
  • Patent number: 7923725
    Abstract: According to a method of manufacturing a semiconductor device of the present invention, a gate electrode is formed above a substrate, and a insulating film is formed above the gate electrode. Then, an amorphous semiconductor film is formed above the insulating film, laser annealing is performed on the amorphous semiconductor film, and the amorphous semiconductor film is changed to a crystalline semiconductor film. After that, hydrofluoric acid processing is performed on the crystalline semiconductor film, and an amorphous semiconductor film is formed above the crystalline semiconductor film where the hydrofluoric acid processing is performed so that pattern ends of the amorphous semiconductor film are arranged outside pattern ends of the crystalline semiconductor film and the amorphous semiconductor film contacts with the insulating film near the pattern ends.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: April 12, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Tomoyuki Irizumi
  • Patent number: 7754541
    Abstract: In a thin film transistor using a polycrystalline semiconductor film, when a storage capacitor is formed, it is often that a polycrystalline semiconductor film is used also in one electrode of the capacity. In a display device having a storage capacitor and thin film transistor which have a polycrystalline semiconductor film, the storage capacitor exhibits a voltage dependency due to the semiconductor film, and hence a display failure is caused. In the display device of the invention, a metal conductive film 5 is stacked above a semiconductor layer 4d made of a polycrystalline semiconductor film which is used as a lower electrode of a storage capacitor 130.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: July 13, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toru Takeguchi, Takuji Imamura, Kazushi Yamayoshi, Tomoyuki Irizumi, Atsunori Nishiura, Kaoru Motonami
  • Publication number: 20100112790
    Abstract: On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength ?, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (?/n)×0.95 to (?/n)×1.
    Type: Application
    Filed: December 5, 2007
    Publication date: May 6, 2010
    Applicant: Mitsubishi Electric Corproation
    Inventors: Kazuyuki Sugahara, Naoki Nakagawa, Shinsuke Yura, Toru Takeguchi, Tomoyuki Irizumi, Kazushi Yamayoshi, Atsuhiro Sono
  • Publication number: 20090294769
    Abstract: According to a method of manufacturing a semiconductor device of the present invention, a gate electrode is formed above a substrate, and a insulating film is formed above the gate electrode. Then, an amorphous semiconductor film is formed above the insulating film, laser annealing is performed on the amorphous semiconductor film, and the amorphous semiconductor film is changed to a crystalline semiconductor film. After that, hydrofluoric acid processing is performed on the crystalline semiconductor film, and an amorphous semiconductor film is formed above the crystalline semiconductor film where the hydrofluoric acid processing is performed so that pattern ends of the amorphous semiconductor film are arranged outside pattern ends of the crystalline semiconductor film and the amorphous semiconductor film contacts with the insulating film near the pattern ends.
    Type: Application
    Filed: May 21, 2009
    Publication date: December 3, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Tomoyuki IRIZUMI
  • Publication number: 20080135909
    Abstract: In a thin film transistor using a polycrystalline semiconductor film, when a storage capacitor is formed, it is often that a polycrystalline semiconductor film is used also in one electrode of the capacity. In a display device having a storage capacitor and thin film transistor which have a polycrystalline semiconductor film, the storage capacitor exhibits a voltage dependency due to the semiconductor film, and hence a display failure is caused. In the display device of the invention, a metal conductive film 5 is stacked above a semiconductor layer 4d made of a polycrystalline semiconductor film which is used as a lower electrode of a storage capacitor 130.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 12, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Toru Takeguchi, Takuji Imamura, Kazushi Yamayoshi, Tomoyuki Irizumi, Atsunori Nishiura, Kaoru Motonami
  • Publication number: 20080068698
    Abstract: A display unit that includes a signal line provided over a substrate, a conductive film provided away from the signal line in a same layer as the signal line; a insulating base film provided over the signal line and conductive film, a polysilicon film provided over the insulating base film, an interlayer dielectric formed over the polysilicon film, a pixel electrode formed over the interlayer dielectric and a connection pattern formed away from the pixel electrode over the interlayer dielectric for connecting the polysilicon film with the signal line. A crystal grain size of the polysilicon having the conductive film formed in a lower portion is larger than a crystal grain size of the polysilicon film not having the conductive film in a lower portion.
    Type: Application
    Filed: August 14, 2007
    Publication date: March 20, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Tomoyuki IRIZUMI
  • Patent number: 7091659
    Abstract: An organic electro luminescence element includes a substrate, an anode isolating film formed of an insulator on the substrate, an anode conductive layer formed on an upper surface of the substrate in an area partitioned by the anode isolating film, and an element isolating film formed of an insulator to enclose the anode isolating film and to be wider downward. Further, on the upper surface of the anode isolating film, a conductive film of the same type as the anode conductive layer is formed, which conductive layer is also covered by the element isolating film. Preferably, the anode isolating film has its upper surface made larger than the lower surface.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: August 15, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroyuki Fuchigami, Kazushi Yamayoshi, Tomoyuki Irizumi, Koji Oda
  • Publication number: 20040256984
    Abstract: An organic electro luminescence element includes a substrate, an anode isolating film formed of an insulator on the substrate, an anode conductive layer formed on an upper surface of the substrate in an area partitioned by the anode isolating film, and an element isolating film formed of an insulator to enclose the anode isolating film and to be wider downward. Further, on the upper surface of the anode isolating film, a conductive film of the same type as the anode conductive layer is formed, which conductive layer is also covered by the element isolating film. Preferably, the anode isolating film has its upper surface made larger than the lower surface.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 23, 2004
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroyuki Fuchigami, Kazushi Yamayoshi, Tomoyuki Irizumi, Koji Oda
  • Patent number: 6784117
    Abstract: In a method for manufacturing a semiconductor device having a USG film 5 formed on a semiconductor substrate 1 in which an N+-type active region 2 and a P+-type active region 3 are formed, an oxide film 4 is formed on the semiconductor substrate 1 and the USG film 5 is formed on the oxide film 4. Because the influence of the characteristic difference of an underlying layer on the formation of the USG film 5 can be avoided due to the existence of the oxide film, the USG film 5 can be formed in a uniform thickness over regions including the semiconductor substrate 1, the P+-type active region 3 and the N+-type active region 2.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Tomoyuki Irizumi
  • Publication number: 20030216055
    Abstract: In a method for manufacturing a semiconductor device having a USG film 5 formed on a semiconductor substrate 1 in which an N+-type active region 2 and a P+-type active region 3 are formed, an oxide film 4 is formed on the semiconductor substrate 1 and the USG film 5 is formed on the oxide film 4. Because the influence of the characteristic difference of an underlying layer on the formation of the USG film 5 can be avoided due to the existence of the oxide film, the USG film 5 can be formed in a uniform thickness over regions including the semiconductor substrate 1, the P+-type active region 3 and the N+-type active region 2.
    Type: Application
    Filed: October 24, 2002
    Publication date: November 20, 2003
    Inventor: Tomoyuki Irizumi