Abstract: An abnormality detection device includes: a process value acquirer that acquires, during operation of a plant including a plurality of devices, a process value of at least one monitoring target device among the plurality of devices; a command value acquirer that acquires a command value of a control operation amount for controlling the monitoring target device; and an abnormality detector that detects an abnormality of the monitoring target device on the basis of a relationship between a fluctuation range of a process value acquired by the process value acquirer and a fluctuation range of a command value acquired by the command value acquirer during a predetermined period.

Abstract: Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Abstract: Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

Abstract: Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Abstract: Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

Abstract: Provided is a semiconductor device including: an active portion provided thereon; a plurality of trench portions each including a gate conductive portion and arranged in a array direction while extending in a extending direction in the active portion, a conductive portion shape ratio of a trench length to a width of the gate conductive portion array direction being 1,000 or more; a first control pad protruding toward an inner side of the semiconductor substrate from a first outer peripheral side of the semiconductor substrate in a top view; and a first well region provided below the first control pad and to cover the first control pad in the top view, in which a shortest distance between the first well region and a trench center position as a center of a length of the plurality of trench portions in the extending direction in the top view is 1,000 ?m or more.

Abstract: Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Abstract: Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Abstract: Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

Abstract: A semiconductor device is provided, including: a semiconductor substrate; an active portion provided on the semiconductor substrate; a first well region and a second well region provided on the semiconductor substrate and arranged sandwiching the active portion in a top view; a peripheral well region provided on the semiconductor substrate and arranged enclosing the active portion in a top view; an intermediate well region provided on the semiconductor substrate and arranged between the first well region and the second well region in a top view; a first pad arranged above the first well region and a second pad arranged above the second well region; and a temperature sense diode arranged above the intermediate well region.

Abstract: Among trenches disposed in a striped-shape parallel to a front surface of a semiconductor substrate, a gate electrode at a gate potential is provided in a gate trench, via a gate insulating film; and in a dummy trench, a dummy gate electrode at an emitter electric potential is provided, via a dummy gate insulating film. Among mesa regions, in a first mesa region functioning as a MOS gate, a first p-type base region is provided in a surface region overall. In a second mesa region not functioning as a MOS gate, a second p-type base region is selectively provided at a predetermined interval, along a first direction. At least one of the trenches on each side of a mesa region is a gate trench and at at least one side wall of the gate trench, a MOS gate is driven. As a result, the ON voltage may be reduced.

Abstract: Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Abstract: Among trenches disposed in a striped-shape parallel to a front surface of a semiconductor substrate, a gate electrode at a gate potential is provided in a gate trench, via a gate insulating film; and in a dummy trench, a dummy gate electrode at an emitter electric potential is provided, via a dummy gate insulating film. Among mesa regions, in a first mesa region functioning as a MOS gate, a first p-type base region is provided in a surface region overall. In a second mesa region not functioning as a MOS gate, a second p-type base region is selectively provided at a predetermined interval, along a first direction. At least one of the trenches on each side of a mesa region is a gate trench and at at least one side wall of the gate trench, a MOS gate is driven. As a result, the ON voltage may be reduced.

Abstract: An ultrasonic testing apparatus includes an ultrasonic probe disposed under an end portion of a pipe laid in the horizontal direction to face the pipe end portion. The probe transmits ultrasonic waves to the end portion of the pipe and receives the ultrasonic waves therefrom. A probe holder housing the probe includes a coupling medium reserver part which surrounds a space between the probe and the end portion of the pipe to contain a coupling medium W. The coupling medium reserver part includes a part body 21 into which the coupling medium is supplied; an annular bellows part, which is attached to the upper side of the part body to internally communicate with the part body, and an annular spacer 23 attached to the upper side of the bellows part, the upper surface of the annular spacer being a flat horizontal surface.

Abstract: An ultrasonic testing apparatus for a pipe end portion, which enables accurate ultrasonic testing, comprises an ultrasonic probe disposed under the pipe end portion. The probe 1 transmits ultrasonic waves to the pipe end portion and receives the ultrasonic waves therefrom. A probe holder houses the probe which is disposed under the pipe end portion to face the pipe end portion and follows the pipe rotation. The probe holder comprises a coupling medium reserver part that surrounds a space between the probe and the pipe end portion to contain a coupling medium therein and comprises a coupling medium reserver part body into which the coupling medium is supplied. An annular bellows part, which communicates with the reserver part body, can expand and contract vertically and an annular spacer, which is attached to the upper side of the bellows part and an upper surface thereof has a flat horizontal surface.

Abstract: An ultrasonic testing apparatus includes an ultrasonic probe disposed under an end portion of a pipe laid in the horizontal direction to face the pipe end portion. The probe transmits ultrasonic waves to the end portion of the pipe and receives the ultrasonic waves therefrom. A probe holder housing the probe includes a coupling medium reserver part which surrounds a space between the probe and the end portion of the pipe to contain a coupling medium W. The coupling medium reserver part includes a part body 21 into which the coupling medium is supplied; an annular bellows part, which is attached to the upper side of the part body to internally communicate with the part body, and an annular spacer 23 attached to the upper side of the bellows part, the upper surface of the annular spacer being a flat horizontal surface.

Abstract: An ultrasonic testing apparatus for a pipe end portion, which enables accurate ultrasonic testing, comprises an ultrasonic probe disposed under the pipe end portion. The probe 1 transmits ultrasonic waves to the pipe end portion and receives the ultrasonic waves therefrom. A probe holder houses the probe which is disposed under the pipe end portion to face the pipe end portion and follows the pipe rotation. The probe holder comprises a coupling medium reserver part that surrounds a space between the probe and the pipe end portion to contain a coupling medium therein and comprises a coupling medium reserver part body into which the coupling medium is supplied. An annular bellows part, which communicates with the reserver part body, can expand and contract vertically and an annular spacer, which is attached to the upper side of the bellows part and an upper surface thereof has a flat horizontal surface.