Patents by Inventor Tomoyuki Someya
Tomoyuki Someya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170602Abstract: A detection device according to an aspect includes: a sensor base; a plurality of photoelectric conversion elements that are provided in a detection area of the sensor base and are configured to receive light incident thereon and output signals corresponding to the received light; a plurality of switching elements provided in the respective photoelectric conversion elements; a plurality of gate lines that are coupled to the switching elements and extend in a first direction; a first light source configured to emit first light having a first maximum emission wavelength; and a second light source configured to emit second light having a second maximum emission wavelength.Type: ApplicationFiled: January 29, 2024Publication date: May 23, 2024Inventors: Hirofumi KATO, Takanori TSUNASHIMA, Makoto UCHIDA, Takashi NAKAMURA, Akio TAKIMOTO, Takao SOMEYA, Tomoyuki YOKOTA
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Patent number: 11963433Abstract: The present invention provides an organic electroluminescence device capable of having not only a device lifetime comparable to that of an existing organic electroluminescence device but also a small thickness of smaller than 10 ?m and excellent flexibility. The present invention relates to an organic electroluminescence device having a structure including: an anode; a cathode on a substrate; and a laminate of multiple layers between the anode and the cathode, the device having a thickness of smaller than 10 ?m.Type: GrantFiled: December 6, 2019Date of Patent: April 16, 2024Assignees: The University of Tokyo, Nippon Hoso Kyokai, Nippon Shokubai Co., Ltd.Inventors: Takao Someya, Tomoyuki Yokota, Hirohiko Fukagawa, Takahisa Shimizu, Katsuyuki Morii, Tsuyoshi Goya, Kenji Kuwada
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Publication number: 20240071128Abstract: A detection device includes a plurality of optical sensors arranged in a detection area, a light source configured to emit light that is emitted to an object to be detected and is detected by the optical sensors, and a processor configured to perform processing based on outputs from the optical sensors. The processor is configured to determine, based on the outputs of the respective optical sensors obtained at a cycle of a predetermined period, an optical sensor an output of which is to be employed from among the optical sensors.Type: ApplicationFiled: November 3, 2023Publication date: February 29, 2024Inventors: Hirofumi KATO, Makoto UCHIDA, Takanori TSUNASHIMA, Takashi NAKAMURA, Akio TAKIMOTO, Takao SOMEYA, Tomoyuki YOKOTA
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Patent number: 9449814Abstract: A problem in the conventional technique is that metal contamination on a silicon carbide surface is not sufficiently removed in a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate. Accordingly, there is a high possibility that the initial characteristics of a manufactured silicon carbide semiconductor device are deteriorated and the yield rate is decreased. Further, it is conceivable that the metal contamination has an adverse affect even on the long-term reliability of a semiconductor device. In a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate, there is applied a metal contamination removal process, on a silicon carbide surface, including a step of oxidizing the silicon carbide surface and a step of removing a film primarily including silicon dioxide formed on the silicon carbide surface by the step.Type: GrantFiled: April 30, 2013Date of Patent: September 20, 2016Assignee: Hitachi, Ltd.Inventors: Natsuki Yokoyama, Tomoyuki Someya
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Publication number: 20130244407Abstract: A problem in the conventional technique is that metal contamination on a silicon carbide surface is not sufficiently removed in a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate. Accordingly, there is a high possibility that the initial characteristics of a manufactured silicon carbide semiconductor device are deteriorated and the yield rate is decreased. Further, it is conceivable that the metal contamination has an adverse affect even on the long-term reliability of a semiconductor device. In a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate, there is applied a metal contamination removal process, on a silicon carbide surface, including a step of oxidizing the silicon carbide surface and a step of removing a film primarily including silicon dioxide formed on the silicon carbide surface by the step.Type: ApplicationFiled: April 30, 2013Publication date: September 19, 2013Inventors: Natsuki YOKOYAMA, Tomoyuki SOMEYA
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Patent number: 8445352Abstract: A problem in the conventional technique is that metal contamination on a silicon carbide surface is not sufficiently removed in a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate. Accordingly, there is a high possibility that the initial characteristics of a manufactured silicon carbide semiconductor device are deteriorated and the yield rate is decreased. Further, it is conceivable that the metal contamination has an adverse affect even on the long-term reliability of a semiconductor device. In a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate, there is applied a metal contamination removal process, on a silicon carbide surface, including a step of oxidizing the silicon carbide surface and a step of removing a film primarily including silicon dioxide formed on the silicon carbide surface by the step.Type: GrantFiled: November 11, 2008Date of Patent: May 21, 2013Assignee: Hitachi, Ltd.Inventors: Natsuki Yokoyama, Tomoyuki Someya
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Publication number: 20090209090Abstract: A problem in the conventional technique is that metal contamination on a silicon carbide surface is not sufficiently removed in a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate. Accordingly, there is a high possibility that the initial characteristics of a manufactured silicon carbide semiconductor device are deteriorated and the yield rate is decreased. Further, it is conceivable that the metal contamination has an adverse affect even on the long-term reliability of a semiconductor device. In a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate, there is applied a metal contamination removal process, on a silicon carbide surface, including a step of oxidizing the silicon carbide surface and a step of removing a film primarily including silicon dioxide formed on the silicon carbide surface by the step.Type: ApplicationFiled: November 11, 2008Publication date: August 20, 2009Inventors: Natsuki YOKOYAMA, Tomoyuki SOMEYA
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Patent number: 5940272Abstract: An electric apparatus has a plurality of electric parts and a casing made of electrically conductive material for accommodating therein or mounting thereon a plurality of electric parts. The casing, which has a cavity therein, is provided with a plurality of projections for radiating heat generated by the electric parts in the cavity. The casing is provided with openings for allowing a heat conductive medium to flow into and out of the casing. Further, an electric apparatus has a plurality of electric parts and a casing made of electrically conductive material for accommodating therein or mounting thereon a plurality of electric parts. The casing is provided with openings for allowing a heat conductive medium to flow into and out of the casing. The casing is provided therein with a partition wall which is made of electrically conductive material for dividing the interior of the casing into a plurality of zones along a direction of a flow of the heat conductive medium.Type: GrantFiled: August 1, 1997Date of Patent: August 17, 1999Assignee: Hitachi, Ltd.Inventors: Akihiko Emori, Hiroyuki Hanei, Tsunehiro Endo, Tomoyuki Someya, Masahiro Iwamura, Noboru Akiyama, Kazuo Kato
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Patent number: 5734616Abstract: A static RAM includes pre-amplifiers, which are made up solely of emitter-follower transistors having their collectors supplied with the power voltage, in one-to-one correspondence to sub common data line pairs which are connected by column switches to complementary data line pairs of memory arrays. The pre-amplifier is provided with a first switch which turns on during the selected state to connect the sub common data line pair to the bases of the transistors and a second switch which turns on during the unselected state to provide the bases with a certain bias voltage lower than the readout signal voltage on the sub common data line pair. The emitter-follower transistors have their emitters connected commonly to form common emitter lines, which are connected to pairs of input terminals of main amplifiers made up of CMOS transistors.Type: GrantFiled: August 8, 1996Date of Patent: March 31, 1998Assignee: Hitachi, Ltd.Inventors: Hideto Kazama, Shuichi Miyaoka, Akihiko Emori, Kinya Mitsumoto, Tomoyuki Someya, Masahiro Iwamura, Noboru Akiyama
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Patent number: 5268587Abstract: A semiconductor integrated circuit device includes a dielectric breakdown prevention circuit coupled to an external terminal for protecting an input stage circuit. The prevention circuit has bipolar transistors and complementary MISFETs including a first MISFET of a first conductivity type and a second MISFET of a second conductivity type. A first semiconductor region of the first conductivity type is formed by the same layer as a well region in which the second MISFET is formed. A second semiconductor region of the second conductivity type is formed in said first semiconductor region by the same layer as source and drain regions of the second MISFET. These first and second semiconductor regions form a first PN junction diode. The external terminal is electrically coupled to one end portion of said second semiconductor region.Type: GrantFiled: November 1, 1991Date of Patent: December 7, 1993Assignee: Hitachi, Ltd.Inventors: Jun Murata, Hideyuki Miyazawa, Kyoichiro Asayama, Akihiro Tamba, Seigou Yukutake, Hiroyuki Miyazawa, Yutaka Kobayashi, Tomoyuki Someya
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Patent number: 5081515Abstract: A semiconductor integrated circuit device is equipped with a DRAM whose memory cell is formed as a series circuit of a memory cell selection MISFET and a data storage capacitance element of a stacked structure. A complementary data line extends on an upper electrode layer of the data storage capacitance element of the stacked structure through an inter-level insulation film which is connected to a semiconductor region of the memory cell selection MISFET. To reduce parasitic capacitance the wiring width of the complementary data line is formed to be smaller than the film thickness of the inter-level insulation film between the complementary data line and the upper electrode layer of said data storage capacitance element of the stacked structure.Type: GrantFiled: March 20, 1990Date of Patent: January 14, 1992Assignee: Hitachi, Ltd.Inventors: Jun Murata, Hideyuki Miyazawa, Kyoichiro Asayama, Akihiro Tamba, Seigou Yukutake, Hiroyuki Miyazawa, Yutaka Kobayashi, Tomoyuki Someya