Abstract: The present invention includes a semiconductor package that forms the solder array joints on the die surface and corresponding BGA substrate and PCB respectively. The life times of array solder joints are increased through the use of two sets of array joints. The top array comprises a plurality of high melting solder joints and a plurality of low melting solder joints, while the bottom array comprises a plurality of high melting solder joints only. The reflow temperature of SMT assembly is between the aforementioned high melting point and low melting point of solder joints. In addition, each solder joint comprises a flat surface at its front edge.

Abstract: The present invention includes a semiconductor package that forms a solder array joints on the die surface and their corresponding PCB respectively. The life times of array solders are increased through use of two set of array joints that have high and low melting points. The high melting solders are served as the dummy ones to sustain the overall stand-offs of array joints. The solder size in the same solder array is identical. The melting solders with high and low melting points implemented on a semiconductor die are heading one to one attached to the correspondingly melting solders of high and low melting points in PCB site. The reflow temperature of smt assembly is between the aforemetioned high and low melting points. In addition, the solder joints with directional properties are made so as to make the fanout connections on PCB site.

Abstract: The present invention discloses a semiconductor package that forms a solder array joints on the die surface and their corresponding PCB respectively. The life times of array solders are increased through use of two set of array joints that have high and low melting points. The high melting solders are served as the dummy ones to sustain the overall stand-offs of array joints. The solder size in the same solder array is identical. The melting solders with high and low melting points implemented on a semiconductor die are heading one to one attached to thecorrespondingly melting solders of high and low melting points in PCB site. The reflow temperature of smt assembly is between the aforemetioned high and low melting points. In addition, the solder joints with directional properties are made so as to make the fanout connections on PCB site.

Abstract: A chip carrier for carrying a chip is disclosed.

Abstract: A semiconductor package, including semiconductor dies, a ball grid array, and a printed circuit board, is described. Said package has been designed with a view to minimizing its level of internal mechanical stress. This has been achieved through use of two sets of solder joints that have different melting points. The joints with the higher melting point are positioned in the region, on the ball grid array, where it is known that stress will be a maximum in the finished package. The lower melting point joints occupy the remaining positions on the underside of the ball grid array. Ball grid array and printed circuit board are attached to one another by heating at a temperature that is between the aforementioned two melting points.