Abstract: There is disclosed a shared multiprocessing system with several nodes, or processing units, interconnected together for communication purposes by a dual channeled crossbar switch. Several such multichannel crossbar switches can be linked together to form a large cohesive processing system where processing units from one node can access memory from another node on the same crossbar or from another node on a different crossbar. The interconnection between crossbars is accomplished by a circular ring. In operation, the system allows for long memory latencies while not increasing the length of short (local) memory latencies. This is, accomplished by storing the bulk of long latency requests at the local processing unit and only sending the request when there is an actual availability of communication capacity to handle the long latency request.