Abstract: An information processing apparatus detecting presence or absence of abnormality of a vacuum pump derived from a product produced within a target vacuum pump, including: a determination unit configured to determine a normal variation range or a normal time variation behavior of a target state quantity which is a state quantity varying depending on a load of gas flowing into the vacuum pump, based on at least one of past target state quantities of the target vacuum pump or another vacuum pump; and a comparison unit configured to compare a current target state quantity of the target vacuum pump with the normal variation range or the normal time variation behavior and output the comparison result.

Abstract: An information processing apparatus detecting presence or absence of abnormality of a vacuum pump derived from a product produced within a target vacuum pump, including: a determination unit configured to determine a normal variation range or a normal time variation behavior of a target state quantity which is a state quantity varying depending on a load of gas flowing into the vacuum pump, based on at least one of past target state quantities of the target vacuum pump or another vacuum pump; and a comparison unit configured to compare a current target state quantity of the target vacuum pump with the normal variation range or the normal time variation behavior and output the comparison result.

Abstract: A semiconductor device, includes an input buffer, first and second PMOS transistors serially interconnected between a first power supply node and an output node of the input buffer. First and second NMOS transistors are serially interconnected between a second power supply node and the output node of the input buffer. A replica circuit includes a third and fourth PMOS transistors serially interconnected between the first power supply node and an output node of the replica circuit. Third and fourth NMOS transistors are serially interconnected between the second power supply node and the output node of the replica circuit. The input node of the replica circuit is connected to the output node of the replica circuit and a comparison circuit compares a voltage at the output node of the replica circuit to a reference voltage.

Abstract: A semiconductor device, includes an input buffer, first and second PMOS transistors serially interconnected between a first power supply node and an output node of the input buffer. First and second NMOS transistors are serially interconnected between a second power supply node and the output node of the input buffer. A replica circuit includes a third and fourth PMOS transistors serially interconnected between the first power supply node and an output node of the replica circuit. Third and fourth NMOS transistors are serially interconnected between the second power supply node and the output node of the replica circuit. The input node of the replica circuit is connected to the output node of the replica circuit and a comparison circuit compares a voltage at the output node of the replica circuit to a reference voltage.

Abstract: A semiconductor device includes a first input buffer adjusting a logic threshold voltage, a first replica circuit, a first reference voltage generating circuit, and a first comparator circuit. The first replica circuit is identical in circuit configuration to the first input buffer. The first replica circuit has an input and an output connected to the input. The first replica circuit generates the logic threshold voltage as an output voltage. The first reference voltage generating circuit generates a first reference voltage. The first comparator circuit compares the logic threshold voltage as an output voltage of the first replica circuit to the first reference voltage to generate a first threshold adjustment signal. The first comparator circuit supplies the first threshold adjustment signal to the first input buffer and the first replica circuit. The first threshold adjustment signal allows the first input buffer to adjust the logic threshold voltage.

Abstract: A semiconductor device includes a first input buffer adjusting a logic threshold voltage, a first replica circuit, a first reference voltage generating circuit, and a first comparator circuit. The first replica circuit is identical in circuit configuration to the first input buffer. The first replica circuit has an input and an output connected to the input. The first replica circuit generates the logic threshold voltage as an output voltage. The first reference voltage generating circuit generates a first reference voltage. The first comparator circuit compares the logic threshold voltage as an output voltage of the first replica circuit to the first reference voltage to generate a first threshold adjustment signal. The first comparator circuit supplies the first threshold adjustment signal to the first input buffer and the first replica circuit. The first threshold adjustment signal allows the first input buffer to adjust the logic threshold voltage.

Abstract: A semiconductor device includes a first input buffer adjusting a logic threshold voltage, a first replica circuit, a first reference voltage generating circuit, and a first comparator circuit. The first replica circuit is identical in circuit configuration to the first input buffer. The first replica circuit has an input and an output connected to the input. The first replica circuit generates the logic threshold voltage as an output voltage. The first reference voltage generating circuit generates a first reference voltage. The first comparator circuit compares the logic threshold voltage as an output voltage of the first replica circuit to the first reference voltage to generate a first threshold adjustment signal. The first comparator circuit supplies the first threshold adjustment signal to the first input buffer and the first replica circuit. The first threshold adjustment signal allows the first input buffer to adjust the logic threshold voltage.

Abstract: A semiconductor device includes a first input buffer adjusting a logic threshold voltage, a first replica circuit, a first reference voltage generating circuit, and a first comparator circuit. The first replica circuit is identical in circuit configuration to the first input buffer. The first replica circuit has an input and an output connected to the input. The first replica circuit generates the logic threshold voltage as an output voltage. The first reference voltage generating circuit generates a first reference voltage. The first comparator circuit compares the logic threshold voltage as an output voltage of the first replica circuit to the first reference voltage to generate a first threshold adjustment signal. The first comparator circuit supplies the first threshold adjustment signal to the first input buffer and the first replica circuit. The first threshold adjustment signal allows the first input buffer to adjust the logic threshold voltage.

Abstract: An adhesive is applied onto a flexible resistive film 1 and dried to form an adhesive layer 2. A metal foil 3 is contacted onto the layer 2, which is subjected to a heat and pressing treatment. The foil 3 is polished. An ultraviolet light curable ink is applied on the foil 3 and dried to form a first layer 4. A negative film is placed on or over the layer 4 and ultraviolet light is irradiated thereto through the film so that the layer 4 is cured. Uncured portions of the layer 4 is removed so that cured portions thereof remain and the foil 3 is exposed between the remaining cured portions. The metal foil 3 is subjected to an etching treatment to remove exposed portions of the foil 3 so that unexposed portions of the foil 3 remain and form conductors 3A. The cured portions of the layer 4 is removed from the conductors 3A. A metal plating film 5 is formed on each conductor 3A to form each electrical conductive circuit 9.

Abstract: A flexible circuit board device for connecting to an electronic device comprised of a flexible circuit board made from flexible resistive film, an adhesive layer formed on the flexible resistive film, electrical conductive circuits formed on the adhesive layer and cured films filling the gaps between the conductive circuits. The electrical conductive circuits are formed of conductor metal foil and a plating film covering the surface of the conductor.