Abstract: A display apparatus includes a switching unit that switches a display state of a second screen such that display targets displayed in a first screen are included at a certain ratio in a case where the first screen transitions to the second screen according to an operator and display targets displayed in the second screen and an arrangement of the display targets are changed from the display targets displayed on the first screen and an arrangement of the display targets.

Abstract: A display apparatus includes a switching unit that switches a display state of a second screen such that display targets displayed in a first screen are included at a certain ratio in a case where the first screen transitions to the second screen according to an operator and display targets displayed in the second screen and an arrangement of the display targets are changed from the display targets displayed on the first screen and an arrangement of the display targets.

Abstract: In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.

Abstract: In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.

Abstract: Dielectric pedestal structures embedded in a sacrificial material layer is formed between a substrate and an alternating stack of insulating layers and spacer material layers. After memory openings are formed through the alternating layer, a cavity is formed by removal of the sacrificial material layer selective to the dielectric pedestal structures. A memory film, a semiconductor channel layer, and a dielectric core are sequentially formed in the volume including the cavity and the memory openings. A backside trench is formed through the alternating stack in an area that straddles the dielectric pedestal structures. By recessing the dielectric pedestal structures selective to the semiconductor channel layer, planar regions and vertical regions of the semiconductor channel layer can be physically exposed, which are converted into source regions. Contact resistance can be lowered due the increased contact area provided by vertical source portions.

Abstract: In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.

Abstract: In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.

Abstract: In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.

Abstract: In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.

Abstract: A computer readable medium storing a program causing a computer to execute a process for document processing, the process includes: receiving image data obtained by, with an image reading apparatus, reading a document of a predetermined format in which contents of an electronic document stored in a storage portion while being associated with identification information, the identification information, and an entry for additional information are arranged; extracting entered additional information from the entry area of the received image data; and correlating the extracted additional information with an electronic document associated with the identification information.

Abstract: A document processing apparatus includes: a storage that stores a manner of a document on which a document processing is performed in a series of tasks; a creating unit that creates an instructing image including an image of information identifying the document, an image of the manner, and an image of a first entry column on which an information indicating that a manner of an actual document is different from the stored manner is entered; an output unit that outputs the instructing image; a receiving unit that receives a read-instructing image corresponding to the instructing image, the read-instructing image being read by an image reading device; an extracting unit that extracts first information entered on a second entry column provided in the read-instructing image and second information identifying the document; and a storage that correlates the first information and the second information, and that stores the correlated information.

Abstract: A developer level control blade is provided which can form a developer layer on a developer carrying member in a proper thickness and in a uniform state and can keep the developer, in particular, color toner particles from melt-adhering to the charge control face so that faulty images such as lines and non-uniformity can be kept from occurring. Also provided is a process for manufacturing this developer level control blade. The process for manufacturing the developer level control blade is characterized by having the steps of extruding a blade member material melted to liquefy, covering therewith a support member thin-plate metal member at an edge portion thereof to join the both together, and cooling the blade member material to solidify, followed by cutting in a preset length.

Abstract: Program disturb is reduced in a non-volatile storage system during a program operation for a selected word line by initially using a pass voltage with a lower amplitude on word lines which are adjacent to the selected word line. This helps reduce charge trapping at floating gate edges, which can widen threshold voltage distributions with increasing program-erase cycles. When program pulses of higher amplitude are applied to the selected word line, the pass voltage switches to a higher level to provide a sufficient amount of channel boosting. The switch to a higher pass voltage can be triggered by a specified program pulse being applied or by tracking lower state storage elements until they reach a target verify level. The amplitude of the program voltage steps down when the pass voltage steps up, to cancel out capacitive coupling to the selected storage elements from the change in the pass voltage.

Abstract: Program disturb is reduced in a non-volatile storage system during a program operation for a selected word line by initially using a pass voltage with a lower amplitude on word lines which are adjacent to the selected word line. This helps reduce charge trapping at floating gate edges, which can widen threshold voltage distributions with increasing program-erase cycles. When program pulses of higher amplitude are applied to the selected word line, the pass voltage switches to a higher level to provide a sufficient amount of channel boosting. The switch to a higher pass voltage can be triggered by a specified program pulse being applied or by tracking lower state storage elements until they reach a target verify level. The amplitude of the program voltage steps down when the pass voltage steps up, to cancel out capacitive coupling to the selected storage elements from the change in the pass voltage.

Abstract: Capacitive coupling from storage elements on adjacent bit lines is compensated by adjusting voltages applied to the adjacent bit lines. An initial rough read is performed to ascertain the data states of the bit line-adjacent storage elements, and during a subsequent fine read, bit line voltages are set based on the ascertained states and the current control gate read voltage which is applied to a selected word line. When the current control gate read voltage corresponds to a lower data state than the ascertained state of an adjacent storage element, a compensating bit line voltage is used. Compensation of coupling from a storage element on an adjacent word line can also be provided by applying different read pass voltages to the adjacent word line, and obtaining read data using a particular read pass voltage which is identified based on a data state of the word line-adjacent storage element.

Abstract: Capacitive coupling from storage elements on adjacent bit lines is compensated by adjusting voltages applied to the adjacent bit lines. An initial rough read is performed to ascertain the data states of the bit line-adjacent storage elements, and during a subsequent fine read, bit line voltages are set based on the ascertained states and the current control gate read voltage which is applied to a selected word line. When the current control gate read voltage corresponds to a lower data state than the ascertained state of an adjacent storage element, a compensating bit line voltage is used. Compensation of coupling from a storage element on an adjacent word line can also be provided by applying different read pass voltages to the adjacent word line, and obtaining read data using a particular read pass voltage which is identified based on a data state of the word line-adjacent storage element.

Abstract: A document processing apparatus includes: a storage that stores a manner of a document on which a document processing is performed in a series of tasks; a creating unit that creates an instructing image including an image of information identifying the document, an image of the manner, and an image of a first entry column on which an information indicating that a manner of an actual document is different from the stored manner is entered; an output unit that outputs the instructing image; a receiving unit that receives a read-instructing image corresponding to the instructing image, the read-instructing image being read by an image reading device; an extracting unit that extracts first information entered on a second entry column provided in the read-instructing image and second information identifying the document; and a storage that correlates the first information and the second information, and that stores the correlated information.

Abstract: A developer level control blade is provided which can form a developer layer on a developer carrying member in a proper thickness and in a uniform state and can keep the developer, in particular, color toner particles from melt-adhering to the charge control face so that faulty images such as lines and non-uniformity can be kept from occurring. Also provided is a process for manufacturing this developer level control blade. The process for manufacturing the developer level control blade is characterized by having the steps of extruding a blade member material melted to liquefy, covering therewith a support member thin-plate metal member at an edge portion thereof to join the both together, and cooling the blade member material to solidify, followed by cutting in a preset length.

Abstract: A computer readable medium storing a program causing a computer to execute a process for document processing, the process includes: receiving image data obtained by, with an image reading apparatus, reading a document of a predetermined format in which contents of an electronic document stored in a storage portion while being associated with identification information, the identification information, and an entry for additional information are arranged; extracting entered additional information from the entry area of the received image data; and correlating the extracted additional information with an electronic document associated with the identification information.

Abstract: An information storage unit stores pieces of information that are classified on the basis of their relationships. An information providing unit provides a client terminal with information stored in the information storage unit via a communication network in response to an access request from the client terminal. An access frequency acquiring unit acquires access frequencies, for respective classification items of the pieces of information, of accesses to the pieces of information. An information generating unit generates prescribed information so that pieces of information of plural classification items will be displayed in the client terminal in such a form as to be based on histories of the access frequencies.