Abstract: A power conversion system includes a housing (outer housing) and a power converter. The power converter is arranged in an internal space of the housing. An outer peripheral surface of the housing is provided with an air inlet and an air outlet. The air outlet communicates with the air inlet via the internal space of the housing and is located below the air inlet.

Abstract: A power receiving device includes: a power receiving antenna to wirelessly receive AC power from a power transmitting antenna in the power transmitting device; a power receiving circuit to convert the AC power received by the power receiving antenna into DC power and to output the DC power; an impedance adjustment circuit disposed on a transmission path between a load that utilizes the DC power and the power receiving antenna, the impedance adjustment circuit being capable of causing a change in input impedance thereof; and a power reception control circuit to control the impedance adjustment circuit. The power reception control circuit consecutively changes a value of the input impedance of the impedance adjustment circuit to a value selected from among a plurality of values, determines from among the plurality of values a value at which power to be supplied to the load becomes largest, and sets and maintains the input impedance at an operating impedance value that is based on the determined value.

Abstract: A power conversion system includes a housing (outer housing) and a power converter. The power converter is arranged in an internal space of the housing. An outer peripheral surface of the housing is provided with an air inlet and an air outlet. The air outlet communicates with the air inlet via the internal space of the housing and is located below the air inlet.

Abstract: In a LCD device, deterioration in display quality due to the difference of the line resistances of scan-line control signal lines is prevented by a simple structure. A gate driver outputs, from respective output terminals connected to scan-line control signal lines of a liquid crystal panel, a panel control pulse for turning on a TFT. A timing control circuit outputs to the gate driver an output enable signal for controlling an output timing of the panel control pulse. The output enable signal includes an enable control pulse for enabling the panel control pulse to be output. The timing control circuit is capable of adjusting the pulse width of the enable control pulse in accordance with the output terminals of the gate driver.

Abstract: A first generation section (106) sequentially turns k first signals to the output state. A second generation section (107) sequentially turns m second signals to the output state. A total of (k×m) output circuits (X1 to Xkm) are divided into k groups. Each of the k groups includes m output circuits. The k first signals correspond to the k groups, and the m second signals correspond to the m output circuits belonging to each of the k groups. Each of the (k×m) output circuits outputs its corresponding second signal when the second signal is turned to the output state if the first signal corresponding to the group to which the output circuit belongs is in the output state.

Abstract: A semiconductor device and driver capable of adequately suppressing generation of a potential difference between drive signals output by liquid crystal display drivers, and suppressing variation in display output between liquid crystal display blocks of a liquid crystal display unit by balancing the drive performance of each liquid crystal display driver with respect to the liquid crystal display unit. Because control is performed to turn ON corresponding switching means only during drive operation of the liquid crystal display drivers to turn ON the switching means only for the liquid crystal display drivers whose drive operation has started, power is supplied via the switching means to the drive supply line of each liquid crystal display driver only from the transmission supply line of the liquid crystal display driver during drive operation. Hence voltages of the drive supply lines of the liquid crystal display drivers are held at substantially the same potential.

Abstract: A semiconductor device and driver capable of adequately suppressing generation of a potential difference between drive signals output by liquid crystal display drivers, and suppressing variation in display output between liquid crystal display blocks of a liquid crystal display unit by balancing the drive performance of each liquid crystal display driver with respect to the liquid crystal display unit. Because control is performed to turn ON corresponding switching means only during drive operation of the liquid crystal display drivers to turn ON the switching means only for the liquid crystal display drivers whose drive operation has started, power is supplied via the switching means to the drive supply line of each liquid crystal display driver only from the transmission supply line of the liquid crystal display driver during drive operation. Hence voltages of the drive supply lines of the liquid crystal display drivers are held at substantially the same potential.