Patents by Inventor Toru Nomura
Toru Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9925660Abstract: A method for positioning a micro-tool (4) comprises: a positioning gauge positioning process (S1) including placing a gauge surface (5d) of a positioning gauge (5) at a needle tip position while the positioning gauge (5) is fixed to a holding part (30), and aligning a mark (5b) provided in the positioning gauge (5) with the optical axis (62a) of an objective lens (62); a positioning gauge focus adjustment process (S2) to focus on the mark (5b) in a state where the positioning gauge (5) has been positioned; and a micro-tool attachment process (S3) including fixing the micro-tool (4) to the holding part (30) after removing the positioning-gauge (5) from the holding part (30).Type: GrantFiled: October 1, 2014Date of Patent: March 27, 2018Assignee: Narishige Lifemed Co., Ltd.Inventor: Toru Nomura
-
Publication number: 20170001302Abstract: A method for positioning a micro-tool (4) comprises: a positioning gauge positioning process (Si) including placing a gauge surface (5d) of a positioning gauge (5) at a needle tip position while the positioning gauge (5) is fixed to a holding part (30), and aligning a mark (5b) provided in the positioning gauge (5) with the optical axis (62a) of an objective lens (62); a positioning gauge focus adjustment process (S2) to focus on the mark (5b) in a state where the positioning gauge (5) has been positioned; and a micro-tool attachment process (S3) including fixing the micro-tool (4) to the holding part (30) after removing the positioning-gauge (5) from the holding part (30).Type: ApplicationFiled: October 1, 2014Publication date: January 5, 2017Applicant: Narishige Lifemed Co., Ltd.Inventor: Toru Nomura
-
Patent number: 7338838Abstract: A resin-encapsulation semiconductor device of this invention includes a die pad for mounting a semiconductor element; a plurality of supporting leads; a semiconductor element; a plurality of leads disposed to have tips thereof opposing the die pad; metal wires; and an encapsulation resin for encapsulating the die pad excluding a bottom thereof, the leads excluding bottoms and outside edges thereof, connecting regions with the metal wires, the supporting leads and the semiconductor element. The outside edges of the leads are disposed on substantially the same plane as the side face of the encapsulation resin, and the tip of each lead has a thin portion where the thickness is reduced in an upper face thereof.Type: GrantFiled: March 28, 2005Date of Patent: March 4, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Toru Nomura
-
Patent number: 7309624Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.Type: GrantFiled: July 12, 2006Date of Patent: December 18, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
-
Publication number: 20060252183Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.Type: ApplicationFiled: July 12, 2006Publication date: November 9, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
-
Patent number: 7125751Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.Type: GrantFiled: January 26, 2005Date of Patent: October 24, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
-
Patent number: 7026192Abstract: A terminal land frame includes a frame body and a plurality of lands. Each of these lands is formed out of the frame body to be connected to the frame body via a thinned portion and protrude therefrom. When the lands are pressed in a direction in which the lands protrude from the frame body, the thinned portions are fractured and the lands are easily separable from the frame body. A semiconductor chip is mounted on some of the lands of the terminal land frame, and the chip, wires, etc. are single-side-molded with a resin encapsulant. Thereafter, when the lands are pressed on the bottom, the lands are separated from the frame body. As a result, a structure, in which the lower part of each of these lands protrudes downward from the lower surface of the resin encapsulant, is obtained, and protruding portion is used as an external electrode.Type: GrantFiled: June 10, 2002Date of Patent: April 11, 2006Assignee: Matsushita Electric Industrial Co. Ltd.Inventors: Masanori Minamio, Osamu Adachi, Toru Nomura
-
Publication number: 20050167855Abstract: A resin-encapsulation semiconductor device of this invention includes a die pad for mounting a semiconductor element; a plurality of supporting leads; a semiconductor element; a plurality of leads disposed to have tips thereof opposing the die pad; metal wires; and an encapsulation resin for encapsulating the die pad excluding a bottom thereof, the leads excluding bottoms and outside edges thereof, connecting regions with the metal wires, the supporting leads and the semiconductor element. The outside edges of the leads are disposed on substantially the same plane as the side face of the encapsulation resin, and the tip of each lead has a thin portion where the thickness is reduced in an upper face thereof.Type: ApplicationFiled: March 28, 2005Publication date: August 4, 2005Applicant: Matsushita Electric Industrial Co. Ltd.Inventors: Masanori Minamio, Toru Nomura
-
Publication number: 20050133892Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.Type: ApplicationFiled: January 26, 2005Publication date: June 23, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
-
Patent number: 6909168Abstract: A resin-encapsulation semiconductor device of this invention includes a die pad for mounting a semiconductor element; a plurality of supporting leads; a semiconductor element; a plurality of leads disposed to have tips thereof opposing the die pad; metal wires; and an encapsulation resin for encapsulating the die pad excluding a bottom thereof, the leads excluding bottoms and outside edges thereof, connecting regions with the metal wires, the supporting leads and the semiconductor element. The outside edges of the leads are disposed on substantially the same plane as the side face of the encapsulation resin, and the tip of each lead has a thin portion where the thickness is reduced in an upper face thereof.Type: GrantFiled: July 22, 2002Date of Patent: June 21, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Toru Nomura
-
Publication number: 20040155363Abstract: The resin-encapsulated semiconductor device of the present invention includes: a die pad provided by thinning a lower portion of a lead frame; a semiconductor chip mounted on the die pad; a plurality of leads provided by thinning an upper portion of the lead frame; a connection member for connecting the semiconductor chip and the lead with each other; a plurality of suspension leads connected to the die pad; and an encapsulation resin for encapsulating an upper portion of the lead frame. In this way, it is possible to further reduce the thickness of a resin-encapsulated semiconductor device, while upsetting the die pad. Furthermore, the stress occurring from the encapsulation resin is absorbed by the self flexural deformation of the die pad and the lead, which are thinned, thereby improving the connection reliability.Type: ApplicationFiled: February 10, 2004Publication date: August 12, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masanori Minamio, Toru Nomura
-
Publication number: 20040155361Abstract: The resin-encapsulated semiconductor device of the present invention includes: a die pad provided by thinning a lower portion of a lead frame; a semiconductor chip mounted on the die pad; a plurality of leads provided by thinning an upper portion of the lead frame; a connection member for connecting the semiconductor chip and the lead with each other; a plurality of suspension leads connected to the die pad; and an encapsulation resin for encapsulating an upper portion of the lead frame. In this way, it is possible to further reduce the thickness of a resin-encapsulated semiconductor device, while upsetting the die pad. Furthermore, the stress occurring from the encapsulation resin is absorbed by the self flexural deformation of the die pad and the lead, which are thinned, thereby improving the connection reliability.Type: ApplicationFiled: December 31, 2003Publication date: August 12, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masanori Minamio, Toru Nomura
-
Patent number: 6710430Abstract: A resin-encapsulated semiconductor device includes a die pad, a semiconductor chip mounted on the die pad, and a group of leads. The group of leads include at least three kinds of leads, including first, second and third leads. While the first lead and the third lead are connected to each other upon production of the lead frame, the first lead and the third lead are separated from each other in a subsequent step. Moreover, a thin metal wire for connecting an electrode of the semiconductor chip to the bonding pad of each lead, and an encapsulation resin for encapsulating the semiconductor chip, the leads, the thin metal wire, etc., are provided. The pad of each lead is exposed on a surface of the encapsulation resin so that the pad can function as an external terminal.Type: GrantFiled: February 27, 2002Date of Patent: March 23, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Toru Nomura, Fumihiko Kawai
-
Patent number: 6692991Abstract: The resin-encapsulated semiconductor device of the present invention includes: a die pad provided by thinning a lower portion of a lead frame; a semiconductor chip mounted on the die pad; a plurality of leads provided by thinning an upper portion of the lead frame; a connection member for connecting the semiconductor chip and the lead with each other; a plurality of suspension leads connected to the die pad; and an encapsulation resin for encapsulating an upper portion of the lead frame. In this way, it is possible to further reduce the thickness of a resin-encapsulated semiconductor device, while upsetting the die pad. Furthermore, the stress occurring from the encapsulation resin is absorbed by the self flexural deformation of the die pad and the lead, which are thinned, thereby improving the connection reliability.Type: GrantFiled: August 29, 2002Date of Patent: February 17, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Toru Nomura
-
Patent number: 6680220Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; a resin encapsulant; and a mark member. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. The mark member is embedded in the upper surface of the resin encapsulant. The mark member, which is transferred from a transfer sheet in a single process step, is highly visible and can be formed efficiently.Type: GrantFiled: May 23, 2002Date of Patent: January 20, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
-
Patent number: 6680524Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; and a resin encapsulant. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate and a second bottom face of the semiconductor chip is in contact with the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. A level difference exists between a first bottom face and the second bottom face of the semiconductor chip. The first and second bottom faces are respectively located at a peripheral portion and a central portion of the semiconductor chip. A part of the resin encapsulant is interposed between the first bottom face and the upper surface of the wiring substrate.Type: GrantFiled: October 24, 2001Date of Patent: January 20, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
-
Patent number: 6674154Abstract: A lead frame includes a die pad, a suspension lead and a plurality of leads. The group of leads include at least three kinds of leads, including first, second and third leads. While the first lead and the third lead are connected to each other upon production of the lead frame, a connecting portion therebetween has a smaller thickness than that of the frame body so that the first lead and the third lead can be separated from each other in a subsequent step.Type: GrantFiled: February 27, 2002Date of Patent: January 6, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Toru Nomura, Fumihiko Kawai
-
Patent number: 6667541Abstract: A terminal land frame includes a frame body and a plurality of lands. Each of these lands is formed out of the frame body to be connected to the frame body via a thinned portion and protrude therefrom. When the lands are pressed in a direction in which the lands protrude from the frame body, the thinned portions are fractured and the lands are easily separable from the frame body. A semiconductor chip is mounted on some of the lands of the terminal land frame, and the chip, wires and so on, are single-side-molded with a resin encapsulant. Thereafter, when the lands are pressed on the bottom, the lands are separated from the frame body. As a result, a structure, in which the lower part of each of these lands protrudes downward from the lower surface of the resin encapsulant, is obtained, and that protruding portion is used as an external electrode. In this manner, a downsized and thinned resin-molded semiconductor device is provided at a lower cost and with higher reliability.Type: GrantFiled: October 15, 1999Date of Patent: December 23, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Osamu Adachi, Toru Nomura
-
Publication number: 20030102575Abstract: The resin-encapsulated semiconductor device of the present invention includes: a die pad provided by thinning a lower portion of a lead frame; a semiconductor chip mounted on the die pad; a plurality of leads provided by thinning an upper portion of the lead frame; a connection member for connecting the semiconductor chip and the lead with each other; a plurality of suspension leads connected to the die pad; and an encapsulation resin for encapsulating an upper portion of the lead frame. In this way, it is possible to further reduce the thickness of a resin-encapsulated semiconductor device, while upsetting the die pad. Furthermore, the stress occurring from the encapsulation resin is absorbed by the self flexural deformation of the die pad and the lead, which are thinned, thereby improving the connection reliability.Type: ApplicationFiled: August 29, 2002Publication date: June 5, 2003Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masanori Minamio, Toru Nomura
-
Publication number: 20030038359Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.Type: ApplicationFiled: September 30, 2002Publication date: February 27, 2003Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura