Abstract: A semiconductor device is configured to increase energy absorbed by an active clamp. The semiconductor device comprises a semiconductor element, a sealing resin, and a coating member. The semiconductor element includes a first electrode. The sealing resin covers the semiconductor element. The coating member is interposed between the first electrode and the sealing resin. The coating member contains a material with higher thermal conductivity than the sealing resin.

Abstract: An example switch device includes a switching element to connect/disconnect a current path from a power supply terminal to a ground terminal via a load, and an overcurrent protection circuit to limit output current flowing in the switching element to be an overcurrent limit value or less. When an output short circuit of the load is detected, the overcurrent protection circuit decreases the overcurrent limit value to be lower as a power supply voltage is higher. The overcurrent protection circuit includes a reference current generation portion that includes: a differential amplifier portion, an upper side current generation portion arranged to generate a predetermined an upper side current, a lower side current generation portion arranged to generate a lower side current, and a difference current generation portion arranged to output a difference current based on the lower side current and the upper side current, as the reference current.

Abstract: A semiconductor device includes: a semiconductor region of a first conductivity type having a main surface; a capacitor region of a second conductivity type formed in a surface layer portion of the main surface; and at least one trench structure including a trench formed in the main surface to penetrate the capacitor region, an insulating film covering a wall surface of the trench, and embedded electrodes embedded in the trench so as to form capacitive coupling with the capacitor region through the insulating film.

Abstract: A semiconductor device includes: a first output transistor and a second output transistor configured to be connected between a first terminal and second terminal; an active clamp circuit configured to be connected to a first control terminal of the first output transistor to limit a terminal-to-terminal voltage appearing between the first and second terminals to a clamp voltage or less; a first variable resistive element provided between a node configured to be fed with a control signal and the first control terminal; a second variable resistive element provided between the node and a second control terminal of the second output transistor; and a turn-off circuit configured to be connected to a connection node between the second variable resistive element and the second control terminal so as to be able to turn the second output transistor off.

Abstract: A semiconductor device 1 includes: a split-gate transistor 9 connected between a drain electrode 11 (output electrode OUT) and a ground electrode and having a plurality of individually controllable channel regions; an active clamp circuit 26 configured to limit the output voltage VOUT appearing at the output electrode 11 to a clamp voltage or below; and a gate control circuit 25 configured to raise the ON resistance of the split-gate transistor 9 gently (or stepwise) after the split-gate transistor is switched from the ON state to the OFF state before the active clamp circuit 26 limits the output voltage VOUT.

Abstract: In order both to accommodate instantaneous current as well as overcurrent protection in accordance with the load, an overcurrent protection circuit has: a threshold value generation unit that, in accordance with a threshold value control signal, switches between setting an overcurrent detection threshold value to a first set value (? Iref) and a second set value (? Iset) lower than the first set value; an overcurrent detection unit that compares a sense signal in accordance with the current being monitored and the overcurrent detection value and generates an overcurrent protection signal; a reference value generation unit that generates a reference value (? Iset) in accordance with the seconds set value; a comparison unit that compares the sense signal and the reference value, and generates a comparison signal; and a threshold value control unit that monitors the comparison signal, and generates a threshold value control signal.

Abstract: A switch device includes a switching element that connects/disconnects a current path from a power supply terminal to a ground terminal via a load, and an overcurrent protection circuit that limits output current flowing in the switching element to be an overcurrent limit value or less. When an output short circuit of the load is detected, the overcurrent protection circuit decreases the overcurrent limit value to be lower as a power supply voltage is higher. In addition, the switch device preferably includes a switching element that connects/disconnects a current path from a power supply terminal to a ground terminal via a load, an intermittent control unit that intermittently drives the switching element when an abnormality is detected, and an output voltage monitoring portion that disables the intermittent control unit until an output voltage applied to the load reaches its target value.

Abstract: An overcurrent protection circuit includes a current control part configured to control conductance of a transistor so as to limit an output current flowing when the transistor is turned on to a predetermined upper limit or less, and a duty control part configured to forcibly turning on/off the transistor at a predetermined duty ratio when a temperature protection circuit detects a temperature abnormality in a state where the current control part limits the output current.

Abstract: In order both to accommodate instantaneous current as well as overcurrent protection in accordance with the load, an overcurrent protection circuit has: a threshold value generation unit that, in accordance with a threshold value control signal, switches between setting an overcurrent detection threshold value to a first set value (? Iref) and a second set value (? Iset) lower than the first set value; an overcurrent detection unit that compares a sense signal in accordance with the current being monitored and the overcurrent detection value and generates an overcurrent protection signal; a reference value generation unit that generates a reference value (? Iset) in accordance with the seconds set value; a comparison unit that compares the sense signal and the reference value, and generates a comparison signal; and a threshold value control unit that monitors the comparison signal, and generates a threshold value control signal.

Abstract: A semiconductor device includes: a substrate; a device region provided in the substrate; a terminal covering the device region in a plan view; a plurality of pseudo-bumps densely arranged on the terminal in a state of being opened from a wire; and at least one genuine bump arranged more sparsely than the plurality of the pseudo-bumps on the terminal in a state of being connected to the wire.

Abstract: Disclosed herein is a clamper including a current source that is connected between an external electrode and an internal node and generates a predetermined constant current, a diode having an anode connected to the internal node, and a current mirror that generates a second current corresponding to a first current flowing via the diode and draws the second current from the internal node to a reference voltage node.

Abstract: In order both to accommodate instantaneous current as well as overcurrent protection in accordance with the load, an overcurrent protection circuit has: a threshold value generation unit that, in accordance with a threshold value control signal, switches between setting an overcurrent detection threshold value to a first set value (? Iref) and a second set value (? Iset) lower than the first set value; an overcurrent detection unit that compares a sense signal in accordance with the current being monitored and the overcurrent detection value and generates an overcurrent protection signal; a reference value generation unit that generates a reference value (? Iset) in accordance with the seconds set value; a comparison unit that compares the sense signal and the reference value, and generates a comparison signal; and a threshold value control unit that monitors the comparison signal, and generates a threshold value control signal.

Abstract: Disclosed herein is an overcurrent protection circuit configured to, upon detection of an output current that flows through a switch element reaching a first overcurrent limit value, reduce an overcurrent limit value for the output current from the first overcurrent limit value to a second overcurrent limit value smaller than the first overcurrent limit value.

Abstract: Disclosed is a gate control circuit that generates a gate control signal of an output transistor connected between an application end of a power supply voltage and an application end of an output voltage. The gate control circuit includes a first current source connected between the application end of the power supply voltage and the application end of the output voltage, a second current source connected between an application end of a booster voltage and an application end of a reference voltage, the booster voltage being raised to a voltage value higher than the power supply voltage in a steady state, an output stage that uses at least one of the first and second current sources to generate a gate charge current for charging a gate of the output transistor, and a controller that uses at least one of the first and second current sources according to the output voltage.

Abstract: In order both to accommodate instantaneous current as well as overcurrent protection in accordance with the load, an overcurrent protection circuit has: a threshold value generation unit that, in accordance with a threshold value control signal, switches between setting an overcurrent detection threshold value to a first set value (? Iref) and a second set value (? Iset) lower than the first set value; an overcurrent detection unit that compares a sense signal in accordance with the current being monitored and the overcurrent detection value and generates an overcurrent protection signal; a reference value generation unit that generates a reference value (? Iset) in accordance with the seconds set value; a comparison unit that compares the sense signal and the reference value, and generates a comparison signal; and a threshold value control unit that monitors the comparison signal, and generates a threshold value control signal.

Abstract: An overcurrent protection circuit includes: a first transistor and a second transistor configured to form an amplifier input stage that receives input of a detection signal according to a monitoring target current; and a third transistor configured to form an amplifier output stage that generates a current output signal according to a difference between the detection signal and a reference signal and causes the current output signal to be negatively fed back to the amplifier input stage, wherein the monitoring target current is limited based on the current output signal output from the third transistor.

Abstract: Disclosed herein is an overcurrent protection circuit configured to, upon detection of an output current that flows through a switch element reaching a first overcurrent limit value, reduce an overcurrent limit value for the output current from the first overcurrent limit value to a second overcurrent limit value smaller than the first overcurrent limit value.

Abstract: For example, an overcurrent protection circuit 71 includes a hiccup controller 71b which, when an output current To passing through a switching element 10 goes into an overcurrent state, hiccup-drives the switching element 10 such that predetermined on-period ton and off-period toff alternate. For example, the hiccup controller 71b may control at least one of the on- and off-period ton and toff according to a temperature sense signal S71c. For example, the temperature sense signal S71c may be generated by detecting at least one of temperature Tj of the switching element 10 and a difference in temperature ?Tj between the switching element 10 and another element. For example, when at least one of temperature Tj and the difference in temperature ?Tj is higher than a predetermined threshold value, the hiccup controller 71b may conduct at least one of reduction of the on-period ton and increase of the off-period toff.

Abstract: For example, a semiconductor device includes an output electrode to be connected to an inductive load, a ground electrode to be connected to a ground terminal, first and second transistors connected in parallel between the output and ground electrodes, an active clamp circuit connected to the gate of the first transistor, and a gate control circuit to control the gates of the first and second transistors to keep the first and second transistors on in a first operation state and off in a second operation state. After a transition from the first operation state to the second, before the active clamp circuit operates, the gate control circuit short-circuits between the gate and source of the second transistor.

Abstract: Provided is an overcurrent protection circuit including an overcurrent detection unit configured to compare an output current flowing through a switch element and a predetermined overcurrent detection value to generate an overcurrent detection signal, an output activation detection unit configured to compare an output voltage and a predetermined threshold voltage to generate an output activation detection signal, a logic unit configured to combine the overcurrent detection signal and the output activation detection signal to generate a logic operation signal, and a diagnostic output unit configured to provide diagnostic output, the logic unit shifting the logic operation signal to a logic level of abnormal state when the overcurrent detection signal is shifted to a logic level of overcurrent detection state and holding the logic operation signal at that logic level, unless the output activation detection signal is shifted to a logic level of output activation state.