Patents by Inventor Toshiaki Kawamura

Toshiaki Kawamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971682
    Abstract: A cartridge includes a first unit including a photosensitive member, and a second unit including a developer bearing member and a force receiving portion, the second unit being configured to be rotatable about a first axis to move with respect to the first unit between a first position and a second position. In a state where the first unit is in a same posture as when an image forming operation is performed, the second unit is disposed at the second position by its own weight. The developer bearing member is configured to be rotatable about a second axis. When seen in the direction of the first axis, a first distance between the force receiving portion and the second axis is smaller than a second distance between the first axis and the second axis and a third distance between the first axis and the force receiving portion.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: April 30, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideki Kakuta, Toshiaki Takeuchi, Yu Akiba, Shuichi Gofuku, Tomofumi Kawamura, Yusuke Atsu, Joji Goto
  • Patent number: 10668646
    Abstract: Behavior of a flow of foam ejected to a gypsum slurry can be stabilized, and a relatively large amount of foam can be homogeneously or uniformly dispersed in the slurry. A mixer has a mixing area for preparing gypsum slurry, a slurry delivery section for delivering the slurry from the mixing area, and a feeding port for feeding foam to the slurry in the mixing area and/or the slurry delivery section under pressure. The slurry having the foam mixed therein is supplied to a production line for forming gypsum boards or gypsum-based boards. The feeding port is provided with a partition member dividing an ejecting region. The ejecting region is divided into a plurality of openings, which simultaneously eject the foam to the slurry.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: June 2, 2020
    Assignee: YOSHINO GYPSUM CO., LTD.
    Inventors: Toshiaki Kawamura, Kazuki Nanba
  • Publication number: 20170008192
    Abstract: [Object] Behavior of a flow of foam or foaming agent ejected to a gypsum slurry can be stabilized, and a relatively large amount of foam or foaming agent can be homogeneously or uniformly dispersed in the slurry. [Solution] A mixer (10) has a mixing area (10a) for preparing gypsum slurry (3), a slurry delivery section (4) for delivering the slurry from the mixing area, and a feeding port (60) for feeding foam (M) or a foaming agent to the slurry in the mixing area and/or the slurry delivery section under pressure. The slurry having the foam mixed therein is supplied to a production line (1) for forming gypsum boards or gypsum-based boards. The feeding port is provided with a partition member (62,64,65) dividing an ejecting region (61,61?). The ejecting region is divided into a plurality of openings (63), which simultaneously eject the foam or forming agent to the slurry.
    Type: Application
    Filed: November 17, 2014
    Publication date: January 12, 2017
    Applicant: YOSHINO GYPSUM CO., LTD.
    Inventors: Toshiaki KAWAMURA, Kazuki NANBA
  • Patent number: 7564129
    Abstract: A power semiconductor module according to the present invention includes: a planar base plate having a plurality of insulated substrates soldered on the top surface, the insulated substrates each having power semiconductor elements to be cooled mounted thereon; a plurality of radiation fins projecting from the bottom surface side of the base plate; and a peripheral wall projecting from the bottom surface side of the base plate so as to surround the radiation fins, the projecting length of the radiation fins is less than or equal to that of the peripheral wall, and the peripheral wall has end surfaces present in the same plane.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: July 21, 2009
    Assignee: Nichicon Corporation
    Inventors: Raita Nakanishi, Toshiaki Kawamura
  • Publication number: 20080237847
    Abstract: A power semiconductor module according to the present invention includes: a planar base plate having a plurality of insulated substrates soldered on the top surface, the insulated substrates each having power semiconductor elements to be cooled mounted thereon; a plurality of radiation fins projecting from the bottom surface side of the base plate; and a peripheral wall projecting from the bottom surface side of the base plate so as to surround the radiation fins, the projecting length of the radiation fins is less than or equal to that of the peripheral wall, and the peripheral wall has end surfaces present in the same plane.
    Type: Application
    Filed: March 24, 2008
    Publication date: October 2, 2008
    Applicant: Nichicon Corporation
    Inventors: Raita Nakanishi, Toshiaki Kawamura
  • Patent number: 7257688
    Abstract: Duplicate data are stored in separate storage units SU(0) 16 and the SU(1) 26, respectively. The storage area in each of the SU(0) 16 and the SU(1) 26 is divided into master storage regions and sub storage regions each of which is allocated alternately to the storage units SU(0) 16 and SU(1) 26 in increments of fixed addresses. The store request is issued to both of the storage units SU(0) 16 and SU(1) 26 allocated the master storage region and the sub storage region, and the fetch request is issued to one of the storage units SU(0) 16 and SU(1) 26 allocated the master storage region from the RSC(0) 34 and RSC(1) 44.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: August 14, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kurokawa, Shinichi Mihashi, Hiroshi Yamada, Toshiaki Kawamura
  • Publication number: 20030177311
    Abstract: Duplicate data are stored in separate storage units SU(0) 16 and the SU(1) 26, respectively. The storage area in each of the SU(0) 16 and the SU(1) 26 is divided into master storage regions and sub storage regions each of which is allocated alternately to the storage units SU(0) 16 and SU(1) 26 in increments of fixed addresses. The store request is issued to both of the storage units SU(0) 16 and SU(1) 26 allocated the master storage region and the sub storage region, and the fetch request is issued to one of the storage units SU(0) 16 and SU(1) 26 allocated the master storage region from the RSC(0) 34 and RSC(1) 44.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Hiroshi Kurokawa, Shinichi Mihashi, Hiroshi Yamada, Toshiaki Kawamura
  • Patent number: 6571350
    Abstract: Duplicate data are stored in separate storage units SU(0) 16 and SU(1) 26, respectively. The storage area in each of SU(0) 16 and SU(1) 26 is divided into master storage regions and sub storage regions each of which is allocated alternately to the storage units in increments of fixed addresses. The store request is issued to both of the storage units allocated the master storage region and the sub storage region, and the fetch request is issued to one of the storage units allocated the master storage region from the RSC(0) 34 and RSC(1) 44.
    Type: Grant
    Filed: December 27, 1999
    Date of Patent: May 27, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kurokawa, Shinichi Mihashi, Hiroshi Yamada, Toshiaki Kawamura
  • Publication number: 20020002656
    Abstract: An information processing system and a multi-level hierarchical storage device for use in the information processing system having a plurality of instruction processors and a plurality of main storage devices. The multi-level hierarchical storage device includes a first-cache storage device of a write-through type provided for each instruction processor, a second-cache storage device of a write-back type provided for each main storage device, and a third-cache storage device of a write-through type provided between the first-cache storage device and the second-cache storage device.
    Type: Application
    Filed: January 29, 1998
    Publication date: January 3, 2002
    Inventors: ICHIKI HONMA, HIROSHI KUROKAWA, TOSHIAKI KAWAMURA, EIJI NOMURA
  • Patent number: 5459585
    Abstract: An apparatus for storing high definition image signals capable of processing high definition image signals and low definition image signals using the same apparatus. A storage medium is provided with an interface of low definition image signals. High definition image signals are compressed, transformed into a format according to the specifications of the interface of low definition image signals and are then stored in the storage medium. The compressed image signals taken out from the storage medium are subjected to the format reverse transform for expansion to restore the original high definition image signals. The format-transformed compressed high definition image signals and the compressed high definition image signals taken out from the storage medium are transmitted over a transmission medium via low definition image interface and are, as required, stored in the storage medium or put to other processings, and are then expanded to restore the original high definition image signals.
    Type: Grant
    Filed: August 17, 1993
    Date of Patent: October 17, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hitoaki Owashi, Toshiaki Kawamura, Yoshizumi Watatani, Katsuo Mohri, Michio Ozawa, Hideo Arai, Kyoichi Hosokawa, Kazutaka Naka, Fuzio Okamura
  • Patent number: 5263333
    Abstract: An outdoor unit has a compressor and an outdoor heat exchanger. Each of a plurality of indoor units has an indoor heat exchanger. The outdoor unit is connected in parallel with the plurality of indoor units to form a multi-type air conditioner system having a plurality of refrigeration cycles. A plurality of gaseous flow adjustment valves are provided to the gaseous sides of the indoor units, respectively. A plurality of liquid expansion valves are provided to the liquid sides of the indoor unit, respectively. A refrigerant super-heat degree detector detects a refrigerant super-heat degree of the outdoor heat exchanger or the indoor heat exchangers.
    Type: Grant
    Filed: November 1, 1991
    Date of Patent: November 23, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tooru Kubo, Yoshinobu Fujita, Toshiaki Kawamura, Mitsunobu Maezawa
  • Patent number: 5161388
    Abstract: Electric expansion valves are provided midway along liquid-side pipes connected to indoor units. Electric flow control valves are provided midway along gas-side pipes connected to the indoor units. The indoor units detect air-conditioning loads, and a capability of a compressor is controlled in accordance with the sum of the air-conditioning loads. At the same time, the opening degrees of the flow control valves are controlled in accordance with the individual air-conditioning loads of the indoor units. In the heating operation mode, a high-pressure-side pressure of a refrigeration cycle is detected. When the high-pressure-side pressure becomes a preset value or more, an expansion valve and a flow control valve corresponding to an indoor unit whose operation is stopped are opened to predetermined opening degrees.
    Type: Grant
    Filed: October 25, 1991
    Date of Patent: November 10, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshinobu Fujita, Toshiaki Kawamura, Tooru Kubo, Mitsunobu Maezawa
  • Patent number: 4959778
    Abstract: An address space switching apparatus has a group of conventional registers capable of storing address information and a group of additional registers capable of storing address information longer than the address information stored by the group of conventional registers. The register length of the group of additional registers is not restricted by the length of the group of conventional registers and is selected to be of a magnitude sufficient to define a desired operand address space. Information items stored in the group of additional registers such as a base address and an index value associated with the extended address space are selected when an operand address is to be generated so as to be appropriately employed for the address computation, thereby supplying address information having a length sufficient for the extended address space.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: September 25, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Hiroo Miyadera, Toru Ohtsuki, Toshiaki Kawamura
  • Patent number: 4507934
    Abstract: In a refrigerating system comprising a compressor, a condenser, a capillary tube, and an evaporator, there are provided a check valve on an inlet side of the condenser for preventing a reverse flow of refrigerant from the condenser to the compressor, and a differential valve connected to a delivery side of the condenser. One port of the differential valve is connected with the delivery side of the compressor, so that the differential valve interrupts the flow of the refrigerant from the condenser to the capillary tube upon interruption of the operation of the compressor thereby to improve the operational efficiency of the refrigerating system when the system is started again.
    Type: Grant
    Filed: May 11, 1983
    Date of Patent: April 2, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Tatsuo Tanaka, Toshiaki Kawamura