Patents by Inventor Toshifumi Asakawa

Toshifumi Asakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6677214
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: January 13, 2004
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6225668
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: May 1, 2001
    Assignees: Mega Chips Corporation, Silicon Technology Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6177706
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atoms currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anistropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: January 23, 2001
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6137120
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: October 24, 2000
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6106734
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diaphragm which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: August 22, 2000
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6032611
    Abstract: In order to form a single-crystalline thin film on a polycrystalline substrate using plasma CVD, a downwardly directed mainly neutral Ne atom current is formed by an ECR ion generator (2). A reaction gas such as silane gas which is supplied from a reaction gas inlet pipe (13) is sprayed onto an SiO.sub.2 substrate (11) by an action of the Ne atom current, so that an amorphous Si thin film is grown on the substrate (11) by a plasma CVD reaction. At the same time, a part of the Ne atom current having high directivity is directly incident upon the substrate (11), while another part thereof is incident upon the substrate (11) after its course is bent by a reflector (12). The reflector (12) is so set that all directions of the parts of the Ne atom current which are incident upon the substrate (11) are perpendicular to densest planes of single-crystalline Si.
    Type: Grant
    Filed: March 19, 1997
    Date of Patent: March 7, 2000
    Assignees: Neuralsystems Corporation, Mega Chips Corporation
    Inventors: Toshifumi Asakawa, Masahiro Shindo, Toshikazu Yoshimizu, Sumiyoshi Ueyama
  • Patent number: 6025252
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: February 15, 2000
    Assignee: Mega Chips Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 5993538
    Abstract: In order to form a single-crystalline thin film on a polycrystalline substrate using plasma CVD, a downwardly directed mainly neutral Ne atom current is formed by an ECR ion generator (2). A reaction gas such as silane gas which is supplied from a reaction gas inlet pipe (13) is sprayed onto an SiO.sub.2 substrate (11) by an action of the Ne atom current, so that an amorphous Si thin film is grown on the substrate (11) by a plasma CVD reaction. At the same time, a part of the Ne atom current having high directivity is directly incident upon the substrate (11), while another part thereof is incident upon the substrate (11) after its course is bent by a reflector (12). The reflector (12) is so set that all directions of the parts of the Ne atom current which are incident upon the substrate (11) are perpendicular to densest planes of single-crystalline Si.
    Type: Grant
    Filed: February 13, 1996
    Date of Patent: November 30, 1999
    Assignee: Mega Chips Corporation
    Inventors: Toshifumi Asakawa, Masahiro Shindo, Toshikazu Yoshimizu, Sumiyoshi Ueyama
  • Patent number: 5814150
    Abstract: In order to form a single-crystalline thin film on a polycrystalline substrate using plasma CVD, a downwardly directed mainly neutral Ne atom current is formed by an ECR ion generator (2). A reaction gas such as silane gas which is supplied from a reaction gas inlet pipe (13) is sprayed onto an SiO.sub.2 substrate (11) by an action of the Ne atom current, so that an amorphous Si thin film is grown on the substrate (11) by a plasma CVD reaction. At the same time, a part of the Ne atom current having high directivity is directly incident upon the substrate (11), while another part thereof is incident upon the substrate (11) after its course is bent by a reflector (12). The reflector (12) is so set that all directions of the parts of the Ne atom current which are incident upon the substrate (11) are perpendicular to densest planes of single-crystalline Si.
    Type: Grant
    Filed: February 7, 1996
    Date of Patent: September 29, 1998
    Assignees: Neuralsystems Corporation, Mega Chips Corporation
    Inventors: Toshifumi Asakawa, Masahiro Shindo, Toshikazu Yoshimizu, Sumiyoshi Ueyama
  • Patent number: 5795385
    Abstract: In order to form a single-crystalline thin film on a polycrystalline substrate using plasma CVD, a downwardly directed mainly neutral Ne atom current is formed by an ECR ion generator (2). A reaction gas such as silane gas which is supplied from a reaction gas inlet pipe (13) is sprayed onto an SiO.sub.2 substrate (11) by an action of the Ne atom current, so that an amorphous Si thin film is grown on the substrate (11) by a plasma CVD reaction. At the same time, a part of the Ne atom current having high directivity is directly incident upon the substrate (11), while another part thereof is incident upon the substrate (11) after its course is bent by a reflector (12). The reflector (12) is so set that all directions of the parts of the Ne atom current which are incident upon the substrate (11) are perpendicular to densest planes of single-crystalline Si.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: August 18, 1998
    Assignees: Neuralsystems Corporation, Mega Chips Corporation
    Inventors: Toshifumi Asakawa, Masahiro Shindo, Toshikazu Yoshimizu, Sumiyoshi Ueyama
  • Patent number: 5776253
    Abstract: In order to form a single-crystalline thin film on a polycrystalline substrate using plasma CVD, a downwardly directed mainly neutral Ne atom current is formed by an ECR ion generator (2). A reaction gas such as silane gas which is supplied from a reaction gas inlet pipe (13) is sprayed onto an SiO.sub.2 substrate (11) by an action of the Ne atom current, so that an amorphous Si thin film is grown on the substrate (11) by a plasma CVD reaction. At the same time, a part of the Ne atom current having high directivity is directly incident upon the substrate (11), while another part thereof is incident upon the substrate (11) after its course is bent by a reflector (12). The reflector (12) is so set that all directions of the parts of the Ne atom current which are incident upon the substrate (11) are perpendicular to densest planes of single-crystalline Si.
    Type: Grant
    Filed: March 19, 1997
    Date of Patent: July 7, 1998
    Assignees: Neuralsystems Corporation, Mega Chips Corporation
    Inventors: Toshifumi Asakawa, Masahiro Shindo, Toshikazu Yoshimizu, Sumiyoshi Ueyama
  • Patent number: 5748530
    Abstract: In a non-volatile semiconductor memory device composed of flating gate type memory cells, after the drain or source is charged, it is placed in an electrically floating state and a signal with alternately changing positive and negative potentials is applied to the control gates of the memory cells so as to reduce the charges stored in the floating gates, thereby converging the threshold volatages of the memory cells into a predetermined voltage. Thus, a write/erase operation in the memory device can be carriied out surely in a short time.
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: May 5, 1998
    Assignee: NKK Corporation
    Inventors: Hiroshi Gotou, Toshifumi Asakawa
  • Patent number: 5738731
    Abstract: A solar cell comprising:a first junction part having a first conductivity type first semiconductor film and a second conductivity type second semiconductor film formed on an upper surface of said first semiconductor film; anda second junction part having a first conductivity type third semiconductor film formed on an upper surface of said second semiconductor film and a second conductivity type fourth semiconductor formed on an upper surface of said third semiconductor film,said junction parts arranged from that having a larger forbidden band width along the direction of progress of light through said semiconductor layers,said first, second, third, and fourth semiconductor films being formed of single-crystalline filming;wherein an interlayer conductor prepared from a metal forming ohmic junctions with each of said junction parts and having a thickness capable of transmitting light therethrough is interposed between said first and second junction parts; andwherein said second semiconductor film arranged on on
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: April 14, 1998
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 5729494
    Abstract: In a non-volatile semiconductor memory device composed of flating gate type memory cells, after the drain or source is charged, it is placed in an electrically floating state and a signal with alternately changing positive and negative potentials is applied to the control gates of the memory cells so as to reduce the charges stored in the floating gates, thereby converging the threshold voltages of the memory cells into a predetermined voltage. Thus, a write/erase operation in the memory device can be carried out surely in a short time.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: March 17, 1998
    Assignee: NKK Corporation
    Inventors: Hiroshi Gotou, Toshifumi Asakawa
  • Patent number: 5623444
    Abstract: The drain of a memory cell transistor is connected to a sub bit line of an EEPROM. The sub bit line is connected to a main bit line via the drain-source path of a selection transistor. The equivalent capacitance of the sub bit line is precharged to the potential of the main bit line when the selection transistor is temporarily turned on. The potential of the precharged sub bit line tends to drop in the presence of a leakage current component equivalent resistance. However, when the selection transistor is intermittently turned on by using pulses to supply charges from the main bit line to the sub bit line, a drop in sub bit line potential can be prevented.
    Type: Grant
    Filed: August 18, 1995
    Date of Patent: April 22, 1997
    Inventors: Hiroshi Gotou, Toshifumi Asakawa
  • Patent number: 5565697
    Abstract: A semiconductor substrate comprises a foundation, a semiconductor monocrystalline film formed on the foundation, and a high-melting-point metal film or a high-melting-point metal alloy film disposed in at least part of a region between the semiconductor monocrystalline film and the foundation. The high-melting-point metal film disposed below the semiconductor monocrystalline film can be utilized as a conductor in a semiconductor device.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: October 15, 1996
    Assignee: Ricoh Company, Ltd.
    Inventors: Toshifumi Asakawa, Daisuke Kosaka, Haruo Nakayama
  • Patent number: 5459346
    Abstract: A semiconductor substrate comprises a foundation, a semiconductor monocrystalline film formed on the foundation, and a high-melting-point metal film or a high-melting-point metal alloy film disposed in at least part of a region between the semiconductor monocrystalline film and the foundation. The high-melting-point metal film disposed below the semiconductor monocrystalline film can be utilized as a conductor in a semiconductor device.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: October 17, 1995
    Assignee: Ricoh Co., Ltd.
    Inventors: Toshifumi Asakawa, Daisuke Kosaka, Haruo Nakayama
  • Patent number: 5173446
    Abstract: A semiconductor substrate comprises a foundation, a semiconductor monocrystalline film formed on the foundation, and a high-melting-point metal film or a high-melting-point metal alloy film disposed in at least part of a region between the semiconductor monocrystalline film and the foundation. The high-melting-point metal film disposed below the semiconductor monocrystalline film can be utilized as a conductor in a semiconductor device.
    Type: Grant
    Filed: June 13, 1991
    Date of Patent: December 22, 1992
    Assignee: Ricoh Company, Ltd.
    Inventors: Toshifumi Asakawa, Daisuke Kosaka, Haruo Nakayama
  • Patent number: 5008554
    Abstract: An optical signal processing apparatus includes a plurality of plates disposed in parallel at spatial intervals and light LSIs mounted on each of the plates. The transfer of signals in the direction parallel to the surfaces of the plates is performed by lead wires electrically interconnecting the light LSIs. The transfer of signals in the direction normal to the surfaces is performed by the light emitted and received by the light LSIs.
    Type: Grant
    Filed: June 29, 1989
    Date of Patent: April 16, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Toshifumi Asakawa, Haruo Nakayama
  • Patent number: 4250526
    Abstract: A light source capable of producing intermittent flashes of light is used as a light source for illuminating an original. The light source is triggered in response to the read signal and a self-scanning type array of light receptors accumulates the charge representative of a light image focused thereon. In synchronism with the triggering of the light source, the video output is derived from memory means which stores the charge thus accumulated.
    Type: Grant
    Filed: May 23, 1979
    Date of Patent: February 10, 1981
    Assignee: Ricoh Company, Ltd.
    Inventors: Jyoichi Fuwa, Toshifumi Asakawa