Patents by Inventor Toshiharu Nozawa

Toshiharu Nozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160301395
    Abstract: A flip-flop circuit includes a first gate, a first latch, a second gate, a second latch and a third gate. The first gate is configured to operate in accordance with a first edge of a clock signal, and the first latch is configured to hold an output data of the first gate. The second gate is configured to operate in accordance with a second edge of the clock signal, and the second latch is configured to hold an output data via the second gate. The third gate, which is provided between the first latch and the second latch in series with the second gate, is configured to operate in accordance with a control signal which is a delayed signal of the clock signal.
    Type: Application
    Filed: March 23, 2016
    Publication date: October 13, 2016
    Applicant: Socionext Inc.
    Inventors: Hiroshi Suzuki, Toshiharu Nozawa
  • Patent number: 8468481
    Abstract: A design support program executed by a computer includes operations of: locating at least one via hole for coupling target wiring in a first layer in circuit information to wiring in a second layer being different form the first layer; calculating an area of the target wiring based on a length and a width of the target wiring; setting a division condition based on the area and a number of the via hole; dividing the target wiring into divided wirings at a position other than a position where the via hole is provided based on the division condition; generating connection information indicating a connection relationship between the divided wirings and limitation information for coupling the divided wirings via a wiring in a third layer being different from the first layer; and outputting the connection information, the limitation information and circuit information obtained after dividing.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: June 18, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Toshiharu Nozawa, Shigetoshi Wakayama, Mitsuaki Igeta
  • Publication number: 20110041113
    Abstract: A design support program executed by a computer includes operations of: locating at least one via hole for coupling target wiring in a first layer in circuit information to wiring in a second layer being different form the first layer; calculating an area of the target wiring based on a length and a width of the target wiring; setting a division condition based on the area and a number of the via hole; dividing the target wiring into divided wirings at a position other than a position where the via hole is provided based on the division condition; generating connection information indicating a connection relationship between the divided wirings and limitation information for coupling the divided wirings via a wiring in a third layer being different from the first layer; and outputting the connection information, the limitation information and circuit information obtained after dividing.
    Type: Application
    Filed: July 23, 2010
    Publication date: February 17, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Toshiharu NOZAWA, Shigetoshi Wakayama, Mitsuaki Igeta
  • Patent number: 5426726
    Abstract: A character drawing apparatus makes reference to character drawing time data to carry out a pattern drawing process at drawing speeds controlled on the basis of the character drawing time data. Character drawing time intervals required respectively for drawing a plurality of characters can be changed simply by changing the character drawing time data so that the different characters are drawn respectively at different drawing speeds. Thus, the character drawing apparatus attracts effectively the attention of persons looking at characters being drawn and impresses effectively on such persons the information expressed by the characters being drawn.
    Type: Grant
    Filed: May 29, 1990
    Date of Patent: June 20, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Horiuchi, Toshihiko Hata, Toshiharu Nozawa, Satoru Tomita
  • Patent number: 5271093
    Abstract: A contour filling apparatus comprising a display frame memory and a draft memory spatially corresponding thereto. A target shape to be displayed is filled inside by a draft filling means according to a suitable draft scan pattern. The filled shape is drawn in the draft memory. Scan coordinates specifying each dot in the draft memory and the display frame memory are generated in accordance with any of a plurality of previously provided scan patterns. If a dot specified by scan coordinates in the draft memory is found to be a dot filled by the draft filling means, that dot is drawn in the display frame memory where specified by the scan coordinates. The target shape is thus filled on a display screen of the apparatus in a desired scan pattern.
    Type: Grant
    Filed: October 15, 1990
    Date of Patent: December 14, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshihiko Hata, Kaoru Horiuchi, Toshiharu Nozawa, Satoru Tomita
  • Patent number: 4757371
    Abstract: A still picture transmission apparatus in which still picture data is transmitted in packet form from a central terminal having a picture data bank selectively to a plurality of local terminals through a common transmission line at which a plurality of distinct logic channels are established, wherein a packet transmission is conducted in such a manner that a command designating a channel number is transmitted to a desired local terminal to which channel the local terminal is to be connected, and still picture data is transmitted with the use of the packet having said channel number.
    Type: Grant
    Filed: February 19, 1986
    Date of Patent: July 12, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshiharu Nozawa, Shuzi Iwata, Nobuo Fukushima
  • Patent number: 4330786
    Abstract: A transistor causes a current to flow through a heat generating resistor in response to a picture signal and simultaneously, a capacitor coupled to the transistor is charged. When a charged voltage on the capacitor reaches a predetermined magnitude, the transistor stops the current to prevent the resistor from exceeding a predetermined magnitude and the capacitor begins to discharge. A plurality of resistors mentioned above are disposed in a row to form a thermally sensitive head which records a picture image on thermally sensitive paper as determined by the respective picture signals.
    Type: Grant
    Filed: June 17, 1980
    Date of Patent: May 18, 1982
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Etsuo Hatabe, Masatoshi Kato, Fumitake Tokugawa, Toshiharu Nozawa