Abstract: An error correction processing circuit, includes: a division circuit that divides input data into a plurality of pieces of a predetermined data length; a plurality of operation circuits that are provided in parallel, and that perform operations of error correction for the plurality of pieces of data divided by the division circuit, respectively; a multiplexing circuit that multiplexes the plurality of pieces of data for which the operations have been performed by the plurality of operation circuits; and an output circuit that outputs the data multiplexed by the multiplexing circuit.

Abstract: An error correction processing circuit, includes: a division circuit that divides input data into a plurality of pieces of a predetermined data length; a plurality of operation circuits that are provided in parallel, and that perform operations of error correction for the plurality of pieces of data divided by the division circuit, respectively; a multiplexing circuit that multiplexes the plurality of pieces of data for which the operations have been performed by the plurality of operation circuits; and an output circuit that outputs the data multiplexed by the multiplexing circuit.

Abstract: In a synchronous transfer mode/asynchronous transfer mode converting transmission path terminating apparatus, a receive synchronous transfer mode processing unit has an out of synchronization detecting unit for detecting out of synchronization information, and an asynchronous transfer mode cell extracting unit has an asynchronous transfer mode cell synchronizing unit for forcibly outputting a signal representing out of synchronization when receiving the out of synchronization information from the out of synchronization detecting unit, an asynchronous transfer mode cell discard judging unit for forcibly outputting a cell discard signal when receiving the out of synchronization information from the out of synchronization detecting unit, and a storage write controlling unit for forcibly inhibiting an asynchronous transfer mode cell from being written in a storage unit when receiving the out of synchronization information from the out of synchronization detecting unit, thereby always capturing accurate data (cell

Abstract: An optical terminal system having self-monitoring function is disclosed, which includes a high-level group loopback section for internally looping back a serial electric signal, a low-level group loopback section for internally looping back a parallel electric signal, a self-loop section for connecting a receiver device and a transmitter device to loop an electric signal received by the receiver device directly to the transmitter device, and a self-monitoring controller for performing a self-monitoring test on respective components of the receiver device and transmitter device by using the self-loop section and either one of the high-level group loopback section and the low-level group loopback section. The optical terminal system can selfcheck the functions thereof through self-monitoring without depending on a network.

Abstract: Test equipment for a Multi Channel Access (MCA) wireless apparatus includes a Read/Write memory section which operationally replaces an ID.ROM of the apparatus for the purpose of the testing. A personal computer writes area, channel, system, tone group and user code data into the memory section which is read by the operating section in order to configure its channel setting. A measuring device receives code data for a channel setting at which operation is to be checked, sends a corresponding channel designating signal to the wireless apparatus, receives a response signal from the wireless, and forms and sends to the personal computer a result signal indicative of whether the response signal is accepted or rejected. The personal computer operates to send the code data to the measuring device under program control in response to keyboard operation by the user.