Patents by Inventor Toshihiko Mori
Toshihiko Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120013362Abstract: A level converter circuit is provided for converting an input signal of a digital signal having a first signal level into an output signal having a second signal level higher than the first signal level. An amplifier circuit amplifies the input signal and outputs an amplified output signal, and a current generator circuit generates a control current corresponding to an operating current flowing through the amplifier circuit upon change of the signal level of the input signal. A current detector circuit detects the generated control current, and controls the operating current of the amplifier circuit to correspond to the detected control current. The current generator circuit includes series-connected first and second nMOS transistors as inserted between the current detector circuit and the ground. The first nMOS transistor operates responsive to the input signal, and the second nMOS transistor operates responsive to an inverted signal of the input signal.Type: ApplicationFiled: July 13, 2011Publication date: January 19, 2012Inventors: Tetsuya HIROSE, Yuji OSAKI, Toshihiko MORI
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Publication number: 20110293202Abstract: It is aimed to provide a spout member and a packaging bag using the spout member which have excellent handling property and hygiene management performance at the time of supplying water or the like from the outside before and during use such as administration of water and medicine, in which a closure means for freely opening and closing an aperture formed by cutting off parts of peripheral portions of sealed film pieces is protected from a contained content at the time of storage or transportation and which have excellent protecting property even when an inner pressure acts in the packaging bag, excellent contamination preventing property until a spout is opened and excellent contamination preventing property and handling property after opening.Type: ApplicationFiled: September 1, 2009Publication date: December 1, 2011Applicants: FUJIMORI KOGYO CO., LTD., MORINAGA MILK INDUSTRY CO., LTD.Inventors: Yasuhiro Takeda, Kenji Washida, Takahiro Koyama, Tetsushi Mori, Yasuharu Takada, Moritoshi Oguni, Hirotaka Ikeda, Toshihiko Mori, Matsutarou Ono
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Patent number: 7872536Abstract: A variance correction method includes generating a reference current depending on a resistance within a lowpass filter and outputting the reference current to a voltage controlled oscillator, and correcting characteristics of the lowpass filter and a gain of the voltage controlled oscillator based on an output clock of the voltage controlled oscillator.Type: GrantFiled: July 9, 2009Date of Patent: January 18, 2011Assignee: Fujitsu LimitedInventors: Toshihiko Mori, Masafumi Kondo
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Publication number: 20100146779Abstract: A component-embedded printed wiring board (PWB) is disclosed. This PWB includes (a) a fluid-resin embedding section formed at a location corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any air, and the reliable PWB is thus obtainable.Type: ApplicationFiled: February 22, 2010Publication date: June 17, 2010Inventors: Kazuhiko HONJO, Toshihiko MORI, Eiji KAWAMOTO, Junichi KIMURA, Motoyoshi KITAGAWA
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Publication number: 20100147569Abstract: A component-embedded printed wiring board (PWB) is disclosed. This PWB includes (a) a fluid-resin embedding section formed at a location corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any air, and the reliable PWB is thus obtainable.Type: ApplicationFiled: February 22, 2010Publication date: June 17, 2010Inventors: Kazuhiko Honjo, Toshihiko Mori, Eiji Kawamoto, Junichi Kimura, Motoyoshi Kitagawa
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Patent number: 7714613Abstract: A level converter includes a cross-coupled section for holding data and a first switching section connected in series with the cross-coupled section and supplied with a differential input signal. The level converter has a second switching section, a current mirror connection section, a third switching section, and an input/output matching evaluation section. The second switching section is connected in parallel with the cross-coupled section, and the current mirror connection section is connected in a current-mirror configuration with a transistor in the second switching section. The third switching section is connected in series with the current mirror connection section, and the input/output matching evaluation section is used to control a transistor in the third switching section by receiving the input signal and an output node signal.Type: GrantFiled: March 30, 2009Date of Patent: May 11, 2010Assignee: Fujitsu Microelectronics LimitedInventor: Toshihiko Mori
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Publication number: 20100102392Abstract: An ESD protection circuit including a first electrostatic discharge protection circuit provided between first power supply wiring and first ground wiring; a second ESD protection circuit provided between second power supply wiring and second ground wiring; a third ESD protection circuit provided between the first ground wiring and the second ground wiring; a PMOS transistor coupled to the first power supply wiring and provided between a first CMOS circuit coupled to the first ground wiring and the first power supply wiring, the first CMOS circuit receiving a signal from a first internal circuit and outputting a signal to a first node; an NMOS transistor provided between the first node and the first ground wiring; and an ESD detection circuit that renders the PMOS transistor conductive and the NMOS transistor non-conductive during normal operation, and renders the PMOS transistor non-conductive and the NMOS transistor conductive when an ESD is applied.Type: ApplicationFiled: October 27, 2009Publication date: April 29, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Masahito Arakawa, Toshihiko Mori
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Patent number: 7694415Abstract: The printed wiring board (PWB) includes (a) a fluid-resin embedding section formed at a location corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any air, and the reliable PWB is thus obtainable.Type: GrantFiled: May 17, 2006Date of Patent: April 13, 2010Assignee: Panasonic CorporationInventors: Kazuhiko Honjo, Toshihiko Mori, Eiji Kawamoto, Junichi Kimura, Motoyoshi Kitagawa
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Publication number: 20100086243Abstract: A spout member including a base portion which is fixed to a bag body, a cylindrical portion which protrudes upward from the base portion, and a sealing portion which seals a front end of the cylindrical portion through a breakable thin portion is disposed between two sheets of film forming the bag body. A sealing chamber accommodating the cylindrical portion and the sealing portion is opened by tearing the two sheets of film along an opening assisting line. An opening assisting plate protruding to at least one of a left side and a right side of the sealing portion is disposed above the opening assisting line. A sandwiching reinforcement seal portion for reinforcing the two sheets of film by sealing inner surfaces thereof is provided between the opening assisting plate and the opening assisting line.Type: ApplicationFiled: December 3, 2009Publication date: April 8, 2010Inventors: Yasuhiro Takeda, Kenji Washida, Takahiro Koyama, Junichi Hashimoto, Matsutarou Ono, Yasuharu Takada, Toshihiko Mori, Moritoshi Oguni
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Publication number: 20100007425Abstract: A frequency synthesizer includes a voltage-controlled oscillator, a frequency range tuning circuit which detects a frequency control code that sets a voltage-controlled frequency range of the voltage-controlled oscillator corresponding to the frequency division ratio which is variably-set, and a frequency control code memory which stores the frequency control code detected by the frequency range tuning circuit corresponding to the frequency division ratio. In an initialization interval, the frequency range tuning circuit detects the frequency control code corresponding to the frequency division ratio which is variably-set, and the frequency control code memory stores the frequency control code which is detected. In a normal operation interval, in response to the frequency selection signal, the frequency control code, which is stored in the frequency control code memory and corresponds to the frequency division ratio which is variably-set, is output to the voltage-controlled oscillator.Type: ApplicationFiled: September 15, 2009Publication date: January 14, 2010Applicant: FUJITSU LIMITEDInventors: Masafumi KONDOU, Toshihiko MORI
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Publication number: 20090315628Abstract: A variance correction method includes generating a reference current depending on a resistance within a lowpass filter and outputting the reference current to a voltage controlled oscillator, and correcting characteristics of the lowpass filter and a gain of the voltage controlled oscillator based on an output clock of the voltage controlled oscillator.Type: ApplicationFiled: July 9, 2009Publication date: December 24, 2009Applicant: FUJITSU LIMITEDInventors: Toshihiko MORI, Masafumi Kondo
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Publication number: 20090243654Abstract: A level converter includes a cross-coupled section for holding data and a first switching section connected in series with the cross-coupled section and supplied with a differential input signal. The level converter has a second switching section, a current mirror connection section, a third switching section, and an input/output matching evaluation section. The second switching section is connected in parallel with the cross-coupled section, and the current mirror connection section is connected in a current-mirror configuration with a transistor in the second switching section. The third switching section is connected in series with the current mirror connection section, and the input/output matching evaluation section is used to control a transistor in the third switching section by receiving the input signal and an output node signal.Type: ApplicationFiled: March 30, 2009Publication date: October 1, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Toshihiko MORI
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Publication number: 20070201771Abstract: To provide a packaging bag with pour spout which can easily pour out content even if the fluidity is pour and which can reduce residual content. A packaging bag 1 with pour spout wherein the pour spout 10 flow path 11 established in a top part of the packaging bag 1 is partitioned by sealed regions 5a, 7 made by sealing two sheets of film 2, 3, and a shape retaining member 12 which separates these 2 sheets of film 2, 3 is established in the flow path 11 of the pour spout 10; wherein the shape retaining member 12 ensures that a gap 16a, 16b will form between the sealed regions 5a, 7 which partition both sides of the flow path 11 along the whole length, and the shape retaining member 12 is fixed with regards to only one film 2 of the two sheets of film 2, 3.Type: ApplicationFiled: January 26, 2007Publication date: August 30, 2007Inventors: Yasuharu Takada, Toshihiko Mori, Qingge Mao
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Publication number: 20070175920Abstract: To provide a pouch for storing granules which can smoothly pour out the granular content even when filled with various granules. A pouch for storing granules where the perimeter of a front and back pair of synthetic resin film are sealed, wherein: a pouring spout with an easily opened port is formed to protrude out from the top perimeter region of the pouch, and opening support member is placed at the pour spout, and the front and back pair of synthetic resin film are prevented from mutually contacting by the opening support member in the region where the opening support member is established and surrounding regions thereof, so that the opening of the pour spout is always maintained in an open condition.Type: ApplicationFiled: January 26, 2007Publication date: August 2, 2007Inventors: Yasuharu Takada, Toshihiko Mori, Shizuka Fujita
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Publication number: 20070177828Abstract: To make opening of a pour spout easier and two positively prevent inadvertent tearing for a packaging bag with pour spout which has a tube attached in the pour spout. A packaging bag 1 with pour spout wherein a flow path 11 in the pour spout 10 established in the top of a packaging bag 1 is partitioned off by sealed regions 5a, 7 made by sealing two films 2, 3, a tube 12 is attached in side of the flow path 11 of the pour spout 10, and opening guide line 14 which guides opening in a direction which intersects with the flow path 11 of the pour spout 10 is formed in one of the side seal regions 7 of the pour spout 10, and the seal region 5a on the other side which is opposite to the side of the pour spout 10 has a plurality of cut lines 16, 16, which pass through the seal region 5a of the two films 2, 3, and are positioned in line in relation to the ending region 14g of the opening guide line 14.Type: ApplicationFiled: January 26, 2007Publication date: August 2, 2007Inventors: Yasuharu Takada, Toshihiko Mori, Shizuka Fujita
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Publication number: 20060260122Abstract: A component-embedded printed wiring board (PWB) is disclosed. This PWB includes (a) a fluid-resin embedding section formed at place corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with a pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any airs, and the reliable PWB is thus obtainable.Type: ApplicationFiled: May 17, 2006Publication date: November 23, 2006Inventors: Kazuhiko Honjo, Toshihiko Mori, Eiji Kawamoto, Junichi Kimura, Motoyoshi Kitagawa
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Patent number: 7078953Abstract: A level down converter having a first inverter supplied a first power supply voltage, and outputting signals made by logical inversions of input signals, and a second inverter supplied a second power supply voltage being lower than the first power supply voltage, and outputting signals made by logical inversions of output signals from the first inverter, is provided. The first inverter contains a transistor including a gate insulation film having a first film thickness. The second inverter contains a transistor including a gate insulation film having a second film thickness which is thinner than the first film thickness.Type: GrantFiled: June 21, 2004Date of Patent: July 18, 2006Assignee: Fujitsu LimitedInventors: Masafumi Kondou, Toshihiko Mori
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Publication number: 20050233122Abstract: The invention presents a manufacturing method of laminated substrate capable of realizing small size of portable electronic appliances. Prepreg 141 is a thermosetting resin which holds a plate form in first temperature range, has a thermal fluidity in second temperature range, and is cured in third temperature range, and integrating process (118) includes softening (120) of heating prepreg (141) to second temperature range, and softening the resin impregnated in prepreg (141), forced flowing (122) of compressing prepreg (141) before prepreg (141) comes to third temperature range, and forcing the resin to flow into space and gap formed among semiconductor (105), resistor (106), and substrate (101), and hardening (123) of heating prepreg (141) to third temperature range. As a result, without using intermediate material, space and gap formed among semiconductor (105), resistor (106), and substrate (101) can be securely filled with resin.Type: ApplicationFiled: April 18, 2005Publication date: October 20, 2005Inventors: Mikio Nishimura, Toshihiko Mori, Kazuhiko Honjou, Junichi Kimura, Toshihiro Nishii, Shinji Harada, Motoyoshi Kitagawa
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Publication number: 20050035807Abstract: A level down converter having a first inverter supplied a first power supply voltage, and outputting signals made by logical inversions of input signals, and a second inverter supplied a second power supply voltage being lower than the first power supply voltage, and outputting signals made by logical inversions of output signals from the first inverter, is provided. The first inverter contains a transistor including a gate insulation film having a first film thickness. The second inverter contains a transistor including a gate insulation film having a second film thickness which is thinner than the first film thickness.Type: ApplicationFiled: June 21, 2004Publication date: February 17, 2005Inventors: Masafumi Kondou, Toshihiko Mori
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Publication number: 20030126896Abstract: A push-button lock device is provided which allows to increase the combinations of unlocking numbers without increasing greatly the numbers of push-buttons and tumblers by enabling unlocking operation of a plurality of pushes to push the same push-button a plurality of number of times.Type: ApplicationFiled: October 21, 2002Publication date: July 10, 2003Inventor: Toshihiko Mori