Patents by Inventor Toshihiko Usami

Toshihiko Usami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090315192
    Abstract: A method of manufacturing a semiconductor device includes at least bonding wires between electrode pads on a main surface of a semiconductor chip and connection pads on a wiring board. The wires form loop shapes from the electrode pads of the semiconductor chip. The method of manufacturing a semiconductor device also includes at least forming flat parts on the loop-shaped wires, and using a sealing material to seal the semiconductor chip such as to bury the flat parts.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 24, 2009
    Inventor: Toshihiko Usami
  • Patent number: 7633146
    Abstract: Detachably mountable memory card featuring a memory chip(s) and a control chip includes a substrate of an insulating material, conductive layers provided on a first main surface of the substrate, a plurality of external electrode terminals exposed to the opposing, second main surface of the substrate, and conductive portions electrically connecting the conductive layers with corresponding ones of the external electrode terminals. The memory chip(s) and the control chip are electrically connected with ones of the conductive layers. The memory card also includes an encapsulating insulating layer covering the first main surface of the substrate, the fixedly disposed memory and control chips thereon, and the conductive layers, the encapsulating insulating layer having an exposed flat surface representing one main plane surface of the finished memory card, and the second main surface of the substrate representing another main plane surface of the memory card with the exposed external electrode terminals.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: December 15, 2009
    Assignee: Elpida Memory Inc.
    Inventors: Masachika Masuda, Toshihiko Usami
  • Publication number: 20080311504
    Abstract: A method of manufacturing toner including adding an oil phase comprising an organic solvent in which a binder resin, a coloring agent and a releasing agent are dissolved or dispersed and an aqueous phase to an emulsification device equipped with a stirrer, continuously dispersing or emulsifying the oil phase and the aqueous phase in the emulsification device equipped with a stirrer to form a liquid dispersion or emulsion comprising oil phase particles, transporting the liquid dispersion or emulsion to a tank, removing the organic solvent from the liquid dispersion or emulsion followed by drying to form mother toner particles, wherein the releasing agent has been preliminarily prepared to have a dispersion diameter of from 0.15 to 0.
    Type: Application
    Filed: May 21, 2008
    Publication date: December 18, 2008
    Inventors: Mizuki HATTORI, Shinzo Higuchi, Takahiro Kadota, Daisuke Misawa, Hiroshi Takahashi, Toshihiko Usami, Masashi Miyakawa
  • Publication number: 20080290488
    Abstract: Detachably mountable memory card featuring a memory chip(s) and a control chip includes a substrate of an insulating material, conductive layers provided on a first main surface of the substrate, a plurality of external electrode terminals exposed to the opposing, second main surface of the substrate, and conductive portions electrically connecting the conductive layers with corresponding ones of the external electrode terminals. The memory chip(s) and the control chip are electrically connected with ones of the conductive layers. The memory card also includes an encapsulating insulating layer covering the first main surface of the substrate, the fixedly disposed memory and control chips thereon, and the conductive layers, the encapsulating insulating layer having an exposed flat surface representing one main plane surface of the finished memory card, and the second main surface of the substrate representing another main plane surface of the memory card with the exposed external electrode terminals.
    Type: Application
    Filed: February 19, 2008
    Publication date: November 27, 2008
    Inventors: Masachika Masuda, Toshihiko Usami
  • Publication number: 20080182186
    Abstract: To provide a toner manufacturing method including: dissolving or dispersing a toner material into an organic solvent to prepare a toner solution, the toner material containing at least an active hydrogen group-containing compound, polymer reactive with the active hydrogen group-containing compound, binder resin, releasing agent and coloring agent; emulsifying or dispersing the toner solution into an aqueous medium to prepare an emulsified dispersion; reacting the active hydrogen group-containing compound with the polymer reactive with the active hydrogen group-containing compound in the aqueous medium produce an adhesive base material in the form of particle; and removing the organic solvent, wherein time X (hour) from a point where the organic solvent starts to be removed to a point where the concentration of the organic solvent reaches less than 12% by mass and temperature T (° C.) of the emulsified dispersion at the time X satisfy the relationship 5{exp(?0.2 X)+1}?T?50 X?0.2.
    Type: Application
    Filed: January 24, 2008
    Publication date: July 31, 2008
    Inventors: Toshihiko USAMI, Masashi MIYAKAWA
  • Patent number: 7348668
    Abstract: A memory card containing a resin sealed stacking of plural semiconductor chips which are rear surface mounted over a main surface of a base substrate, the rear surface of the substrate being provided with external connection terminals. The relatively lower ones of the stacked semiconductor chips include a memory circuit and may be larger in size than the uppermost chip which contains a control circuit. Resin sealed wiring connections between bonding pads on the main surface of the respective chips and corresponding ones of electrodes on the main surface of the substrate are arranged so as to avoid crossovers between them, with respect to a plan view thereof. A resin cap may be used to cover the main surface side of the base substrate, which has the resin sealed semiconductor chips mounted thereon.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: March 25, 2008
    Assignee: Elpida Memory, Inc.
    Inventors: Masachika Masuda, Toshihiko Usami
  • Publication number: 20060170084
    Abstract: A memory card containing a resin sealed stacking of plural semiconductor chips which are rear surface mounted over a main surface of a base substrate, the rear surface of the substrate being provided with external connection terminals. The relatively lower ones of the stacked semiconductor chips include a memory circuit and may be larger in size than the uppermost chip which contains a control circuit. Resin sealed wiring connections between bonding pads on the main surface of the respective chips and corresponding ones of electrodes on the main surface of the substrate are arranged so as to avoid crossovers between them, with respect to a plan view thereof. A resin cap may be used to cover the main surface side of the base substrate, which has the resin sealed semiconductor chips mounted thereon.
    Type: Application
    Filed: March 30, 2006
    Publication date: August 3, 2006
    Inventors: Masachika Masuda, Toshihiko Usami
  • Patent number: 7061105
    Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: June 13, 2006
    Assignees: Hitachi, Ltd., Akita Electronics Systems Co., Ltd.
    Inventors: Masachika Masuda, Toshihiko Usami
  • Publication number: 20040135262
    Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Application
    Filed: December 24, 2003
    Publication date: July 15, 2004
    Inventors: Masachika Masuda, Toshihiko Usami
  • Patent number: 6686663
    Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: February 3, 2004
    Assignees: Hitachi, Ltd., Akita Electronics Co., Ltd.
    Inventors: Masachika Masuda, Toshihiko Usami
  • Patent number: 6538331
    Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: March 25, 2003
    Assignees: Hitachi, Ltd., Akita Electronics Co., Ltd.
    Inventors: Masachika Masuda, Toshihiko Usami
  • Publication number: 20020180060
    Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Application
    Filed: July 15, 2002
    Publication date: December 5, 2002
    Inventors: Masachika Masuda, Toshihiko Usami
  • Publication number: 20010010397
    Abstract: Two memory chips mounted over a base substrate have the same external size and have a flush memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one and at the same time, they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.
    Type: Application
    Filed: January 26, 2001
    Publication date: August 2, 2001
    Inventors: Masachika Masuda, Toshihiko Usami