Patents by Inventor Toshiki Furutani

Toshiki Furutani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10182518
    Abstract: A shield cap for protecting an electronic component includes a cap member having a ceiling portion, a side wall portion and a partition wall portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The cap member is formed such that the ceiling portion has an inner region and an outer region surrounding the inner region, the side wall portion is supporting the outer region, and the partition wall portion is supporting the inner region, the ceiling portion has a first surface facing the side wall portion and the partition portion and a second surface on the opposite side and includes a reinforcing material positioned between the first and second surfaces, and the cap member is formed such that the side wall, ceiling and partition wall portions are forming multiple accommodation spaces to accommodate multiple electronic components.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: January 15, 2019
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Takema Adachi, Hidetoshi Noguchi, Shota Tachibana
  • Patent number: 10098243
    Abstract: A printed wiring board includes a core laminate body including insulating layers, conductor layers including first and second conductor layers, and via conductors having smaller end surfaces connected to the first conductor layer, a first build-up layer formed on the core body and including an interlayer, a conductor layer on the interlayer, and via conductors having smaller end surfaces connected to the first conductor layer, and a second build-up layer formed on the core body and including an interlayer and a conductor layer on the interlayer. The first conductor layer is embedded such that the first conductor layer has exposed surface on the surface of the core body, the second conductor layer is formed on the other surface of the core body, and the first conductor layer has wiring pattern having the smallest minimum width of wiring patterns of the conductor layers in the core body and build-up layers.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: October 9, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Yuki Yoshikawa
  • Publication number: 20180270951
    Abstract: A printed wiring board includes a first conductor layer forming an inner conductor layer, a second conductor layer forming a first outemiost conductor layer, a third conductor layer forming a second outermost conductor layer, insulating layers including first and second insulating layers, first via conductors connecting the first and second conductor layers, and second via conductors connecting the first and third conductor layers. The first conductor layer has thickness greater than thicknesses of the second and third conductor layers, the second conductor layer includes component mounting pads positioned to mount an electronic component on the second conductor layer and extending outside component mounting region corresponding to projection region of the component, and the first via conductors include a first set of the first via conductors formed directly underneath the component mounting region and a second set of the first via conductors formed on outer side of the component mounting region.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 20, 2018
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Takema Adachi, Toshihide Makino, Hidetoshi Noguchi
  • Patent number: 10070523
    Abstract: A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the wiring layer has first surface exposed from the insulating layer, and a conductor post formed in the insulating layer and on second surface of the wiring layer on the opposite side with respect to the first surface of the wiring layer such that the conductor post has side surface covered by the insulating layer and end surface exposed from the insulating layer on the opposite side with respect to the wiring layer. The conductor post is formed such that the side surface of the conductor post is a roughened side surface having surface roughness of first roughness R1, the end surface of the conductor post is a roughened end surface having surface roughness of second roughness R2, and the first and second roughnesses R1, R2 satisfy R1>R2.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: September 4, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Shunsuke Sakai, Toshiki Furutani, Kosuke Ikeda, Takema Adachi, Takayuki Katsuno
  • Publication number: 20180237934
    Abstract: A printed wiring board includes a core laminate including insulating layers and conductor layers, a first build-up layer formed on first surface of the laminate and including first interlayer resin and conductor layers, and a second build-up layer formed on second surface of the core laminate on the opposite side and including second interlayer resin and conductor layers. The conductor layers in the laminate include first and second conductor layers such that the first conductor layer is embedded in one of the insulating layers forming the first surface of the laminate and has an exposed surface exposed from the insulating layer and that the second conductor layer is formed on one of the insulating layers forming the second surface of the laminate, and the first interlayer resin layer has thickness greater than thickness of the second interlayer resin layer.
    Type: Application
    Filed: April 20, 2018
    Publication date: August 23, 2018
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Yuki Yoshikawa
  • Patent number: 9951434
    Abstract: A printed wiring board includes a core laminate including insulating layers and conductor layers, a first build-up layer formed on first surface of the laminate and including first interlayer resin and conductor layers, and a second build-up layer formed on second surface of the core laminate on the opposite side and including second interlayer resin and conductor layers. The conductor layers in the laminate include first and second conductor layers such that the first conductor layer is embedded in one of the insulating layers forming the first surface of the laminate and has an exposed surface exposed from the insulating layer and that the second conductor layer is formed on one of the insulating layers forming the second surface of the laminate, and the first interlayer resin layer has thickness greater than thickness of the second interlayer resin layer.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: April 24, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Yuki Yoshikawa
  • Publication number: 20180110164
    Abstract: A shield cap for protecting an electronic component includes a cap member having a ceiling portion, a side wall portion and a partition wall portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The cap member is formed such that the ceiling portion has an inner region and an outer region surrounding the inner region, the side wall portion is supporting the outer region, and the partition wall portion is supporting the inner region, the ceiling portion has a first surface facing the side wall portion and the partition portion and a second surface on the opposite side and includes a reinforcing material positioned between the first and second surfaces, and the cap member is formed such that the side wall, ceiling and partition wall portions are forming multiple accommodation spaces to accommodate multiple electronic components.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Applicant: IBIDEN CO., LTD
    Inventors: Toshiki FURUTANI, Takema Adachi, Hidetoshi Noguchi, Shota Tachibana
  • Publication number: 20180110163
    Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The ceiling portion includes a resin material and a reinforcing material, and the cap member is formed such that the side wall portion and the ceiling portion are forming an accommodation space to accommodate an electronic component.
    Type: Application
    Filed: October 12, 2017
    Publication date: April 19, 2018
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Takema ADACHI, Hidetoshi NOGUCHI, Shota TACHIBANA
  • Publication number: 20180110159
    Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves, and a metal layer formed on a portion of the side wall portion such that the metal layer is interposed between the conductive film and the portion of the side wall portion. The side wall and ceiling portions are forming an accommodation space to accommodate an electronic component, and the metal layer is formed on a surface of the side wall portion on the opposite side of a surface of the side wall portion facing the ceiling portion and interposed between the conductive film and the side wall portion.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Takema ADACHI, Hidetoshi NOGUCHI, Shota TACHIBANA
  • Publication number: 20180110161
    Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The side wall and ceiling portions are forming accommodation space to accommodate electronic component, the ceiling portion has a first surface facing the space and a second surface on the opposite side, the side wall portion has a third surface facing the ceiling portion, a fourth surface on the opposite side, a fifth surface facing the space, and a sixth surface on the opposite side, and the side wall portion is formed such that the sixth surface has a first inclined portion increasing distance to the space from the third toward fourth surfaces and a second inclined portion increasing distance to the space from the fourth toward third surfaces.
    Type: Application
    Filed: October 12, 2017
    Publication date: April 19, 2018
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Takema ADACHI, Hidetoshi NOGUCHI, Shota TACHIBANA
  • Patent number: 9883592
    Abstract: A wiring board includes a substrate which has multiple opening portions and one or more boundary portions separating the opening portions, multiple electronic devices positioned in the opening portions of the substrate, respectively, a conductive pattern formed on a surface of the boundary portion, and an insulation layer formed on the substrate and the conductive pattern on the boundary portion of the substrate such that the insulation layer covers the electronic devices in the opening portions of the substrate. The boundary portion has a width which is in a range of approximately 0.05 to approximately 2.0 mm.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: January 30, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Yukinobu Mikado, Toyotaka Shimabe, Shinobu Kato
  • Patent number: 9859221
    Abstract: A multilayer wiring board with built-in electronic components includes a substrate including an insulating material and having multiple opening portions, a first conductor layer formed on a surface of the substrate and having an opening portion such that the substrate has the opening portions inside the opening portion of the first conductor layer, multiple electronic components positioned in the opening portions of the substrate, and an insulating layer formed on the substrate such that the insulating layer is formed on the electronic components and on the first conductor layer. The opening portions are formed in the substrate such that the opening portions include two opening portions and that the substrate has a partition wall formed between the two opening portions.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: January 2, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Toyotaka Shimabe, Toshiki Furutani, Shunsuke Sakai
  • Patent number: 9854669
    Abstract: A printed wiring board includes a first insulating layer, a first conductor layer formed on first surface of the first insulating layer, a second conductor layer formed on second surface of the first insulating layer, a first via structure formed in the first insulating layer such that the first via structure is connecting the first and second conductor layers, a second insulating layer formed on the second surface of the first insulating layer such that the second conductor layer is embedded into the second insulating layer, a third conductor layer formed on the second insulating layer, and a second via structure formed in the second insulating layer such that the second via structure is connecting the second and third conductor layers. The second conductor layer includes a dedicated wiring layer which transmits data between two electronic components to be mounted to the first surface of the first insulating layer.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: December 26, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Yasushi Inagaki, Toshiki Furutani
  • Patent number: 9807885
    Abstract: A wiring board includes electronic components, a multilayer core substrate including insulating layers and conductive layers such that the insulating layers include a central insulating layer in the center position of the core in the thickness direction, a first build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core, and a second build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core. The core has cavities accommodating the electronic components, respectively, and including a first cavity and a second cavity such that the first and second cavities have different lengths in the thickness direction and are penetrating through the central layer at centers of the first and second cavities in the thickness direction.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: October 31, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Kenji Sakai, Tomoyuki Ikeda, Toshiki Furutani
  • Patent number: 9655249
    Abstract: A substrate with a built-in capacitor includes an insulating base material layer, a build-up layer formed on the insulating base material layer and including a conductor layer and an insulating layer, and a multilayer ceramic capacitor positioned in an opening of the base material layer and including internal electrodes, ceramic dielectric layers and a pair of external electrodes. The ceramic capacitor has a cuboid shape having long sides and short sides, the pair of external electrodes is formed on opposing long-side sides such that the external electrodes are separated by a distance in range of 30 ?m to 200 ?m and that each external electrode includes a conductive paste layer connected to a respective group of the internal electrodes and a copper plated layer covering the conductive paste layer, and the conductive paste layer includes Ni paste or Cu paste including glass component in range of 5% to 40%.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: May 16, 2017
    Assignees: IBIDEN CO., LTD., MURATA MANUFACTURING CO., LTD.
    Inventors: Toyotaka Shimabe, Masahiro Kaneko, Toshiki Furutani, Takeshi Tashima, Yasuyuki Shimada, Naoki Shimizu
  • Patent number: 9655242
    Abstract: A printed wiring board includes a first insulating layer having concave portions on first surface of the first insulating layer, a first conductor layer including first circuits formed in the concave portions, a second conductor layer including second circuits on second surface of the first insulating layer, a first via conductor connecting the first and second conductor layers, and a second insulating layer formed on the second surface of the first insulating layer and covering the second conductor layer. Each first circuit has upper, lower and side surfaces such that the upper surface is exposed from the first insulating layer and the side and lower surfaces are not roughened surfaces, each second circuit has top, back and side surfaces such that the side and back surfaces are roughened surfaces, and a thinnest first circuit has a line width L1 smaller than a line width L2 of a thinnest second circuit.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: May 16, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Yasushi Inagaki, Toshiki Furutani
  • Patent number: 9601422
    Abstract: A printed wiring board includes a first interlayer, a first conductive layer on first-surface side of the first interlayer, a second conductive layer on second-surface side of the first interlayer, a first buildup layer including interlayers and conductive layers and formed on first surface of the first interlayer, and a second buildup layer including interlayers and conductive layers and formed on second surface of the first interlayer. The first conductive layer is formed such that the first conductive layer is embedded in the first interlayer and exposing surface on the first surface of the first interlayer, the second conductive layer is formed on the second surface of the first interlayer, and the interlayers in the first buildup layer include a second interlayer positioned adjacent to the first conductive layer and having the greatest thickness among the first interlayer and interlayers in the first and second buildup layers.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: March 21, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Yuki Yoshikawa
  • Patent number: 9564392
    Abstract: A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the conductor layer has a first surface exposed on a first surface side of the insulating layer, and a conductor post formed on a second surface of the conductor layer on the opposite side with respect to the first surface such that the conductor post has a side surface covered by the insulating layer. The conductor post has an end surface on the opposite with respect to the conductor layer such that the end surface of the conductor post is exposed on a second surface side of the insulating layer, and the conductor post has an end portion on a wiring conductor layer side such that the side surface in the end portion is a curved side surface which is bending outward increasingly toward from the conductor layer.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: February 7, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Shunsuke Sakai, Yasushi Inagaki
  • Patent number: 9536801
    Abstract: An electronic component including a wiring board having interlayer insulation layers and conductive patterns, the wiring board having a first surface and a second surface on the opposite side of the first surface, multiple first bumps formed on a first conductive pattern positioned on the first surface of the wiring board among the conductive patterns of the wiring board, a semiconductor element mounted on the first surface of the wiring board through the first bumps, an encapsulating resin encapsulating the semiconductor element and at least a portion of a side surface of the wiring board, the side surface of the wiring board extending between the first surface and second surface of the wiring board, and multiple of second bumps formed on the second surface of the wiring board and connected to a second conductive pattern of the conductive patterns in the wiring board.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: January 3, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Daiki Komatsu, Nobuya Takahashi
  • Patent number: 9510450
    Abstract: A printed wiring board includes a insulation layer, a first conductive layer embedded into first surface of the insulation layer and having surface exposed on the first surface of the insulation layer, a second conductive layer formed on second surface of the insulation layer and protruding from the second surface of the insulation layer, a via penetrating through the insulation layer and electrically connecting the first and second conductive layers, a solder-resist layer covering the first conductive layer and having an opening structure forming an exposed structure of the first conductive layer, and a metal layer formed on the exposed structure and protruding from the first surface of the insulation layer. The exposed structure of the first conductive layer includes pads positioned to mount an electronic component to the first conductive layer, and the metal layer has a solder layer formed on the metal layer and having a flat surface.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: November 29, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Yasushi Inagaki