Abstract: An embodiment is a connecting circuit connected to the preceding stage of a transmission circuit and configured to receive a baseband signal, includes an isolation element connected between an input terminal and an output terminal, a signal midpoint detection circuit connected parallel to the isolation element, a bias adding circuit connected in series with the signal midpoint detection circuit, and an initial voltage value detection circuit connected to a frame detection circuit. The initial voltage value detection circuit holds an initial voltage value of the baseband signal in accordance with the signal of the frame detection circuit, and outputs the initial voltage value to the signal midpoint detection circuit. The signal midpoint detection circuit detects a midpoint voltage from the baseband signal and the initial voltage value, and outputs the midpoint voltage to the bias adding circuit. The bias adding circuit adds the midpoint voltage to a bias voltage.

Abstract: The transmission interface includes a plurality of transmitters, wherein the transmitters are provided with: a power supply terminal shared by the plurality of transmitters, configured to receive a ground voltage; a bias terminal configured to receive a bias voltage; signal terminals configured to receive a signal voltage; a power supply fluctuation inverting bias unit to which a ground voltage and a bias voltage are applied, and which outputs the ground voltage making its fluctuation 180 degrees out of phase; a modulation unit to which the output of the power supply fluctuation inverting bias unit and a signal voltage are applied, and which outputs the opposite phase ground voltage making its fluctuation in phase; and a laser diode to which the ground voltage and the output of the modulation unit are applied.

Abstract: An amplifier circuit includes: an amplifier connected to an isolating element; a signal midpoint detecting circuit connected in parallel with the isolating element; a bias adding circuit connected in series with the signal midpoint detecting circuit; and an initial voltage value detecting circuit connected to the frame detecting circuit. The initial voltage value detecting circuit holds an initial voltage value of the baseband signal using a signal from the frame detecting circuit, and outputs the initial voltage value to the signal midpoint detecting circuit. The signal midpoint detecting circuit detects a midpoint voltage from the baseband signal and the initial voltage value, and outputs the midpoint voltage to the bias adding circuit. The bias adding circuit adds the midpoint voltage to a bias voltage for biasing the baseband signal. The amplifier amplifies the baseband signal.

Abstract: An embodiment is a connecting circuit connected to the preceding stage of a transmission circuit and configured to receive a data signal includes an initial voltage value holding circuit, and a terminating load connected in series with the initial voltage value holding circuit. The initial voltage value holding circuit outputs, to the terminating load, an initial voltage value obtained when no data signal is input, and sets both ends of the terminating load at the same potential by a DC component.

Abstract: A photoelectric conversion device includes a plurality of optical waveguides that are formed on a substrate and have the same waveguide direction, and a plurality of waveguide-type photoelectric conversion elements that are connected to the respective optical waveguides. The plurality of photoelectric conversion elements is arranged in the waveguide direction of the plurality of optical waveguides. In a planar view, the line segment connecting the photoelectric conversion elements adjacent to one another in the waveguide direction of the plurality of photoelectric conversion elements is inclined with respect to the waveguide direction.

Abstract: A predriver includes a first transistor for receiving a signal at a gate thereof, a load resistance, a first peaking inductor, a second peaking inductor, a second transistor for receiving a control voltage at a gate thereof, a third transistor for receiving a control voltage at a gate thereof, an inductor for suppressing the group delay, a first peaking capacitor, a second peaking capacitor, and a peaking resistance.

Abstract: A bonding wire includes a hollow member made of an insulator and mounted such as to bridge ICs formed with interconnects, such that a plurality of open ends is each closed by abutting on a surface of the interconnect that is a connection target, and a connection member made of a conductor, filling inside of the hollow member such as to bond to the surface of the interconnect at a location where the hollow member abuts on the surface of the interconnect.

Abstract: A CMOS inverter circuit is provided as a circuit to modulate a current flowing into a laser diode on the basis of a digital signal. An amplitude of a current flowing in a PMOSFET in the CMOS inverter circuit is made to contribute to an amplitude of the current flowing into the laser diode, to reduce an input amplitude.

Abstract: The DML driver includes: a post driver which supplies a driving current to the LD; and a pre-driver which drives the post driver in response to a modulated signal. The pre-driver has a transistor, a peaking inductor, a peaking inductor, a group delay inhibition inductor, and a peaking capacitor.

Abstract: The optical module includes an extension circuit board and a front end flip-chip mounted on the extension circuit board. The front end includes a semiconductor amplifier chip that executes signal processing, and an optical semiconductor chip that includes at least one of a light emitting element and a light receiving element and is flip-chip mounted on the semiconductor amplifier chip. The extension circuit board has a recessed portion that can accommodate at least a part of the optical semiconductor chip. The semiconductor amplifier chip is flip-chip mounted on the extension circuit board in the state where the surface mounting the optical semiconductor chip faces the surface of the extension circuit board, and at least a part of the optical semiconductor chip is accommodated in the recessed portion.

Abstract: A CMOS inverter circuit is provided as a circuit to modulate a current flowing into a laser diode on the basis of a digital signal. An amplitude of a current flowing in a PMOSFET in the CMOS inverter circuit is made to contribute to an amplitude of the current flowing into the laser diode, to reduce an input amplitude.

Abstract: A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal VGN1 is applied to a gate terminal of a lowermost stage transistor TN1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential VGN2 that is a sum of a minimum gate-source voltage VGN1min and a maximum drain-source voltage VDS1max of a transistor (TN1) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor TN2.

Abstract: A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal VGN1 is applied to a gate terminal of a lowermost stage transistor TN1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential VGN2 that is a sum of a minimum gate-source voltage VGN1min and a maximum drain-source voltage VDS1max of a transistor (TN1) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor TN2.