Patents by Inventor Toshimoto Kodaira

Toshimoto Kodaira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6316790
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: November 13, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 6294796
    Abstract: Thin film transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 Å and 2500 Å which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: September 25, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 6242777
    Abstract: Thin film transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 Å and 2500 Å which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: June 5, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 6037608
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: March 14, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5736751
    Abstract: Thin film transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 .ANG. and 2500 .ANG. which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: April 7, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 5698864
    Abstract: Thin film transistors including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 .ANG. and 2500 .ANG. which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: December 16, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 5677547
    Abstract: Improved thin film transistors resistant to static electricity induced line faults are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional layer formed between crossing source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors or at a display capacitor.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: October 14, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5650637
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: July 22, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5573959
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: November 12, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5554861
    Abstract: Thin file transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 .ANG. and 2500 .ANG. which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: September 10, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 5552615
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: September 3, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5474942
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: December 12, 1995
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5365079
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: February 5, 1993
    Date of Patent: November 15, 1994
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5294555
    Abstract: Thin film transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of less than 2500 .ANG. and active matrix assemblies including thin film transistors provide improved thin-type displays.
    Type: Grant
    Filed: January 30, 1992
    Date of Patent: March 15, 1994
    Assignee: Seiko Epson Corporation
    Inventors: Tishihiko Mano, Toshimoto Kodaira, Hiroyuki Ohshima
  • Patent number: 5124768
    Abstract: Thin film transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of less than 2500 .ANG. and active matrix assemblies including thin film transistors provide improved thin-type displays.
    Type: Grant
    Filed: May 31, 1988
    Date of Patent: June 23, 1992
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Ohshima
  • Patent number: 4623908
    Abstract: The thin film transistor comprises a plurality of individual thin film transistors on a common insulating substrate with the plurality of individual thin film transistors being connected together in series. The gate electrode of each individual transistor of the plurality of thin film transistors is connected to form one common gate electrode for the overall transistor. Leakage current in the OFF condition is substantially reduced. Identical performance is achieved from the transistor with interchangeability in designating source and drain terminals, when a symmetry is provided such that the i-th transistor in a series of N is physically identical to the (N-i+1)-th transistor in the overall transistor.
    Type: Grant
    Filed: March 31, 1983
    Date of Patent: November 18, 1986
    Assignee: Seiko Epson Kabushiki Kaisha
    Inventors: Hiroyuki Oshima, Toshimoto Kodaira, Toshihiko Mano