Patents by Inventor Toshinori Araki

Toshinori Araki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11991178
    Abstract: In a secret computation system, each of the three or more secret computation servers is configured to transmit, to the auxiliary server, carry computation information for computing a carry indicating whether or not digit carry occurs when a share of arithmetic operation is added as a binary number. The auxiliary server is configured to compute the carry based on the carry computation information received and compute an adjustment value used for computing the share of the arithmetic operation from a share of logical operation by using the computed carry. The auxiliary server distributes the computed adjustment value to the three or more secret computation servers. Each of the three or more secret computation servers is configured to convert the share of the logical operation to the share of the arithmetic operation by using a distributed value of the adjustment value.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: May 21, 2024
    Assignee: NEC CORPORATION
    Inventors: Hikaru Tsuchida, Toshinori Araki, Kazuma Ohara
  • Publication number: 20240160946
    Abstract: A learning device for a neural network uses the base data group to update a parameter value of the partial network and a parameter value of the normalization layer associated with the entire base data group, and uses each group of adversarial examples of each adversarial example generation condition to update the parameter value of the partial network and the parameter value of the normalization layer associated with the condition. The neural network includes a partial network, a normalization layer associated with the entirety of a base data group including a plurality of data, and a normalization layer associated with each condition of adversarial example generation.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Applicant: NEC Corporation
    Inventors: Toshinori ARAKI, Kazuya KAKIZAKI, Inderjeet SINGH
  • Publication number: 20240160947
    Abstract: A learning device for a neural network uses a base data group, which is a group including a plurality of data, to update a parameter value of the partial network and a parameter value of the second normalization layer, and uses an adversarial example determined to induce an error in estimation using the neural network, among adversarial examples included in an adversarial data group, which is a group including a plurality of adversarial examples with respect to the data included in the base data group, to update the parameter value of the partial network and a parameter value of the first normalization layer. The neural network includes a partial network, a first normalization layer normalizing data input to the first normalization layer itself, and a second normalization layer normalizing data input to the second normalization layer itself.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Applicant: NEC Corporation
    Inventors: Toshinori Araki, Kazuya Kakizaki, Inderjeet Singh
  • Patent number: 11985232
    Abstract: There is provided a secure computing server that performs shift operation on secretly distributed shares. The secure computing server may perform the shift operation when a number of significant digits of secret information corresponding to a secretly distributed share is to be reduced.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: May 14, 2024
    Assignee: NEC CORPORATION
    Inventor: Toshinori Araki
  • Patent number: 11934518
    Abstract: A verification apparatus acquires a source code for multiparty computation, while changing a combination of options settable to a multiparty computation compiler, compiles the source code for each combination of options to generate a plurality of multiparty computation executable codes, selects at least one multiparty computation executable code from the plurality of multiparty computation executable codes as a verification code and provides the at least one verification code to a verification environment of multiparty computation, generates an evaluation index with respect to an execution result of at least one verification code in the verification environment, and selects at least one recommended code from the plurality of multiparty computation executable codes, based on the evaluation index corresponding to at least one verification code and outputs the selected recommended code.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: March 19, 2024
    Assignee: NEC CORPORATION
    Inventors: Hikaru Tsuchida, Takao Takenouchi, Toshinori Araki, Kazuma Ohara, Takuma Amada
  • Patent number: 11895230
    Abstract: An information processing apparatus comprises a partial modular exponentiation calculating part and a partial modular exponentiation synthesizing part. The partial modular exponentiation calculating part is given a base in plaintext and a modulo in plaintext and shared exponents and calculates a partial modular exponentiation that equals a set of shared values according to a modular exponentiation of the base raised by the shared exponent. The partial modular exponentiation synthesizing part calculates shared values of the modular exponentiation from the partial modular exponentiation that equals shared values relating to the modular exponentiation of a sum of shared exponents.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: February 6, 2024
    Assignee: NEC CORPORATION
    Inventors: Kazuma Ohara, Toshinori Araki
  • Publication number: 20240027955
    Abstract: An image-forming apparatus includes: a main casing; a drawer movable in a first direction between a first position inside the main casing and a second position outside the main casing; process cartridges attachable to and detachable from the drawer; a controller; and a device-side terminal connected to the controller. The process cartridges are arranged in the first direction in an attached state to the drawer. Each process cartridge includes a photosensitive drum, a magnetic roller, a developing container for storing carrier, a conveying member, a toner sensor, a process memory, and a process-side terminal. The toner sensor is configured to output a detection signal corresponding to a concentration of toner in the developing container. The process-side terminal is for both outputting the detection signal of the toner sensor and outputting information about the process cartridge stored in the process memory. The device-side terminal is configured to contact the process-side terminal.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 25, 2024
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Shinta SUGIURA, Shunsuke AIBA, Keita INOUE, Kentaro AOYAMA, Toshinori ARAKI
  • Patent number: 11870892
    Abstract: When an absolute value of a difference value between a first share and a second share which are secret-shared is less than or equal to a natural number t, the information processing apparatus calculates the difference value between the first share and the second share. Furthermore, the information processing apparatus performs a comparison in magnitude of the first share and the second share using bit-decomposition from a least significant bit to an m-th bit (m being a natural number) of the difference value.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: January 9, 2024
    Assignee: NEC CORPORATION
    Inventors: Hikaru Tsuchida, Toshinori Araki, Kazuma Ohara
  • Patent number: 11762332
    Abstract: An image forming apparatus includes a main body, a drum cartridge removably attached to the main body, and a belt unit removably attached to the main body. The main body includes a drum power supply, a belt power supply, and a controller configured to start supplying power from the drum power supply to a drum memory of the drum cartridge, start supplying power from the belt power supply to a belt memory of the belt unit, stop supplying the power from the drum power supply to the drum memory after starting supplying the power from the drum power supply to the drum memory, and stop supplying the power from the belt power supply to the belt memory after starting supplying the power from the belt power supply to the belt memory.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: September 19, 2023
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Toshinori Araki, Tatsuro Yokoi, Seiya Sato, Shinta Sugiura, Koji Akagi, Masaaki Wakizaka, Keita Inoue, Osamu Takahashi
  • Publication number: 20230281964
    Abstract: Deep metric learning models are trained with multi-target adversarial examples by initializing a perturbation applied to a clean sample selected from a training sample set to form an adversarial example, the clean sample associated with a label sample, applying a deep metric learning model to the adversarial example and a plurality of target samples selected from the training sample set to obtain an adversarial feature vector and a plurality of target feature vectors, respectively, adjusting the perturbation to reduce difference among the adversarial feature vector and the plurality of target feature vectors to generate a multi-target adversarial example, applying the deep metric learning model to the clean sample, the label sample, and the multi-target adversarial example to obtain a clean feature vector, a label feature vector, and a multi-target adversarial feature vector, respectively, and adjusting the deep metric learning model based on the clean feature vector, the label feature vector, and the multi-t
    Type: Application
    Filed: March 4, 2022
    Publication date: September 7, 2023
    Inventors: Inderjeet SINGH, Kazuya KAKIZAKI, Toshinori ARAKI
  • Publication number: 20230222782
    Abstract: An adversarial example detection device includes a first feature extraction unit configured to extract first features with respect to input data and comparative data in a first calculation method, a second feature extraction unit configured to extract second features with respect to the input data and the comparative data in a second calculation method different from the first calculation method, and a determination unit configured to determine whether or not at least one piece of the input data and the comparative data is an adversarial example through calculation using the first features and the second features.
    Type: Application
    Filed: June 5, 2020
    Publication date: July 13, 2023
    Applicant: NEC Corporation
    Inventors: Takuma AMADA, Kazuya KAKIZAKI, Toshinori ARAKI
  • Patent number: 11619897
    Abstract: In an image forming apparatus, an image forming unit configured to form a toner image on a transfer medium includes four sets of a photoconductor drum and a development roller, respectively, for forming toner images of first, second, third and fourth colors, arranged in this order, in a direction opposite to a direction of movement of the transfer medium moving toward a detector configured to detect a toner image formed on the transfer medium. A controller executes a bias-corrective test image forming process in which a first bias-corrective test image of the first color is arranged in a position downstream of other three first bias-corrective test images, and a second bias-corrective test image of the first color is arranged in a position between two first bias-corrective test images selected among other three first bias-corrective test images, in the direction of movement of the transfer medium.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: April 4, 2023
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Miho Ishida, Shintaro Fukuoka, Toshio Furukawa, Toshinori Araki, Masaya Takasu, Takuro Nishimura
  • Patent number: 11599681
    Abstract: The present invention provides a bit decomposition secure computation system comprising: a share value storage apparatus to store share values obtained by applying (2, 3) type RSS using modulo of power of 2 arithmetic; a decomposed share value storage apparatus to store a sequence of share values obtained by applying (2, 3) type RSS using modulo 2 arithmetic; and a bit decomposition secure computation apparatus that, with respect to sharing of a value w, r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over (?)}n, where {circumflex over (?)} is a power operator and n is a preset positive integer, being used as share information by the (2, 3) type RSS stored in the share value storage apparatus, includes: an addition sharing unit that sums two values out of r1, r2 and r3 by modulo 2{circumflex over (?)}n, generates and distributes a share value of the (2, 3) type RSS with respect to the sum; and a full adder secure computation unit that executes addition processing of the value generated by the addition s
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: March 7, 2023
    Assignees: NEC CORPORATION, BAR-ILAN UNIVERSITY
    Inventors: Toshinori Araki, Kazuma Ohara, Jun Furukawa, Lindell Yehuda, Nof Ariel
  • Publication number: 20220397852
    Abstract: In an image forming apparatus, an image forming unit configured to form a toner image on a transfer medium includes four sets of a photoconductor drum and a development roller, respectively, for forming toner images of first, second, third and fourth colors, arranged in this order, in a direction opposite to a direction of movement of the transfer medium moving toward a detector configured to detect a toner image formed on the transfer medium. A controller executes a bias-corrective test image forming process in which a first bias-corrective test image of the first color is arranged in a position downstream of other three first bias-corrective test images, and a second bias-corrective test image of the first color is arranged in a position between two first bias-corrective test images selected among other three first bias-corrective test images, in the direction of movement of the transfer medium.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 15, 2022
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Miho ISHIDA, Shintaro FUKUOKA, Toshio FURUKAWA, Toshinori ARAKI, Masaya TAKASU, Takuro NISHIMURA
  • Publication number: 20220343027
    Abstract: A computation system according to the present disclosure includes: shuffling secure computation means for executing secure computation processing by shuffling; random bit sharing means for generating, as security parameters, K pieces of random data; and unauthorized action detecting secure computation means for determining that an exclusive OR operation of values for all rows obtained by multiplying the exclusive OR operation of each row of the tables before the shuffling processing for each data designated by the i-th random data by the i-th random bit of each row is the same as an exclusive OR operation of values for all rows obtained by multiplying the exclusive OR operation of each row of the tables after the shuffling processing for each data designated by the i-th random data by the i-th random bit of each row.
    Type: Application
    Filed: September 26, 2019
    Publication date: October 27, 2022
    Applicants: NEC Corporation, BAR-ILAN UNIVERSITY
    Inventors: Toshinori ARAKI, Kazuma OHARA, Hikaru TSUCHIDA, Jun FURUKAWA, Binyamin PINKAS
  • Publication number: 20220335298
    Abstract: A robust learning device is a learning device that, with a parameter of n neural networks, training data, and a correct label serving as inputs, outputs the updated parameter, including: a model selection unit that selects neural networks, which are less than n and equal to or more than two, among the n neural networks; a limited objective function calculation unit that calculates, in a calculation process of an objective function including a process in which a value of the objective function becomes smaller as an output of the neural networks to the training data is closer to the correct label and a degree of similarity between the neural networks is smaller, a limited objective function including only the process relating to the neural networks selected by the model selection unit; and an update unit that updates the parameter such that a value of the limited objective function is decreased.
    Type: Application
    Filed: October 1, 2019
    Publication date: October 20, 2022
    Applicant: NEC Corporation
    Inventors: Takuma AMADA, Kazuya KAKIZAKI, Toshinori ARAKI
  • Publication number: 20220329596
    Abstract: In a secret computation system, each of the three or more secret computation servers is configured to transmit, to the auxiliary server, carry computation information for computing a carry indicating whether or not digit carry occurs when a share of arithmetic operation is added as a binary number. The auxiliary server is configured to compute the carry based on the carry computation information received and compute an adjustment value used for computing the share of the arithmetic operation from a share of logical operation by using the computed carry. The auxiliary server distributes the computed adjustment value to the three or more secret computation servers. Each of the three or more secret computation servers is configured to convert the share of the logical operation to the share of the arithmetic operation by using a distributed value of the adjustment value.
    Type: Application
    Filed: October 4, 2019
    Publication date: October 13, 2022
    Applicant: NEC Corporation
    Inventors: Hikaru TSUCHIDA, Toshinori ARAKI, Kazuma OHARA
  • Patent number: 11468796
    Abstract: This numerical splitting device: acquires a numerical value w and a parameter p; generates a first random number r1 and a second random number r2; computes a third random number r3 based on the numerical value w, parameter p, first random number r1, and second random number r2 according to an expression, r3=w?r1-r2 mod p; computes first to third segments s1, s2, s3 based on the first to third random numbers r1, r2, r3 and the parameter p according to expressions, s1=r1+r2 mod p, s2=r2+r3 mod p, and s3=r3+r1 mod p; and transmits a pair of the first segment s1 and the second random number r2, a pair of the second segment s2 and the third random number r3, and a pair of the third segment s3 and the first random number r1 to first to third secure computation devices, respectively.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: October 11, 2022
    Assignee: NEC CORPORATION
    Inventors: Toshinori Araki, Kazuma Ohara
  • Patent number: 11467533
    Abstract: An image forming apparatus includes a housing, a drawer, an operation panel, and a sensor. The housing includes a first side wall having a first opening, and a second side wall having a vent and extending in a direction crossing the first side wall. The drawer supports a cartridge. The drawer is movable through the first opening between an inner position at which the drawer is accommodated in the housing and an outer position at which a part of the drawer is exposed to outside the housing. At least part of the operation panel protrudes from an outer surface of the second side wall. The sensor is arranged in the housing between the drawer and the second side wall. The sensor is configured to detect at least temperature or humidity of ambient air taken in through the vent.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: October 11, 2022
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Shunsuke Hachiya, Masaaki Wakizaka, Kentaro Aoyama, Shinta Sugiura, Toshinori Araki, Keita Inoue
  • Patent number: 11435988
    Abstract: There is provided a conversion apparatus with which a secure computation execution environment may be easily constructed. The conversion apparatus comprises an input part and a conversion part. The input part inputs a source code. The conversion part converts the input source code so that a secure computation compiler processes it based on setting information relating to secret computation executed by a plurality of secure computation servers.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 6, 2022
    Assignee: NEC CORPORATION
    Inventors: Toshinori Araki, Hikaru Tsuchida, Kazuma Ohara