Abstract: Provided is a device connected to a clock and data signal lines, comprising: a voltage input unit configured to be inputted with a clock signal as an input signal from the clock signal line and to generate first reference voltage corresponding to a high level of the clock signal; a reference voltage generation unit configured to be inputted with predetermined input voltage and to generate second reference voltage; a voltage regulation unit for generating regulation voltage by using the second reference voltage to convert a level of the first reference voltage; a drive unit for stepping down the regulation voltage to generate output voltage; a control unit; and an output unit connected with the control unit, the drive unit, and the data signal line, for outputting the output voltage to the data signal line in response to input of a high level of a control signal from the control unit.

Abstract: Provided is a device connected to a clock and data signal lines, comprising: a voltage input unit configured to be inputted with a clock signal as an input signal from the clock signal line and to generate first reference voltage corresponding to a high level of the clock signal; a reference voltage generation unit configured to be inputted with predetermined input voltage and to generate second reference voltage; a voltage regulation unit for generating regulation voltage by using the second reference voltage to convert a level of the first reference voltage; a drive unit for stepping down the regulation voltage to generate output voltage; a control unit; and an output unit connected with the control unit, the drive unit, and the data signal line, for outputting the output voltage to the data signal line in response to input of a high level of a control signal from the control unit.

Abstract: There is provided a drive device capable of driving a capacitive load with efficiency and with low power consumption while keeping quality input reproducibility for output signal. A switching drive circuit 10f repeatedly performs operations in the order of VCP charging phase PH_VCP_CH, VCP discharging phase PH_VCP_dCH, VCN charging phase PH_VCN_CH, and VCN discharging phase PH_VCN_dCH. A switching amplifier 10 allows a charging phase per cycle for an input signal VIN that is a reference for operation to be either a phase in which the slope of the input signal VIN is positive from a reference voltage REFL or greater until a maximum voltage, or a phase in which the slope of the input signal VIN is negative from a reference voltage REFH or less until a minimum voltage.

Abstract: There is provided a drive device capable of driving a capacitive load with efficiency and with low power consumption while keeping quality input reproducibility for output signal. A switching drive circuit 10f repeatedly performs operations in the order of VCP charging phase PH_VCP_CH, VCP discharging phase PH_VCP_dCH, VCN charging phase PH_VCN_CH, and VCN discharging phase PH_VCN_dCH. A drive circuit switching amplifier 10 allows a charging phase per cycle for an input signal VIN that is a reference for operation to be either a phase in which the slope of the input signal VIN is positive from a reference voltage REFL or greater until a maximum voltage, or a phase in which the slope of the input signal VIN is negative from a reference voltage REFH or less until a minimum voltage.

Abstract: A driving device and driving method for controlling electric power to a load is provided. The driving device controls switching operations of switching elements by setting a first duration in which electric power is supplied to the load and by setting a second duration in which the load is floated without electric power. The driving device feeds back an output signal outputted from output terminals of the load, receives an input signal, and compares the fed back output signal with the input signal to detect an error. The driving device also generates an error suppression signal to correct the detected error and controls the switching operation of the switching elements based on the error suppression signal.

Abstract: Output signal waveform having high input signal reproducibility is outputted from inductive load or the like. Output signals V1a and V1b obtained by feeding back an output signal Vp-n1 at output terminals 50 and 51 across load L1 to input terminals 9a and 9b are compared with an input signal Vin to detect an error between signals; a first error suppression signal Vout1 is produced such that the detected error between the signals is suppressed; inclination of first error suppression signal Vout1 is detected, and a second error suppression signal Vout2 is produced such that inclination error to input signal Vin is suppressed based on the detected inclination signal; and the ratio between the period that electric power is supplied to the load L1 and the period that electric power is not supplied to the load L1 is modified according to the error of the error suppression signal.

Abstract: A waveform of the output signal having high reproducibility to an input signal is outputted from capacitive load. Even the driving device is configured as a switching amplifier and drives capacitive load. Reactive power can be reduced to perform low power consumption. Output signals V1a and V1b that an output signal Vcap1 across output terminals 50 and 51 of load C1 fed back to input terminals 9a and 9b are compared with an input signal Vin so that error between output signals V1a and V1b is detected. A first error suppression signal Vout1 is produced so as to suppress the detected error between signals. The proportion of a first duration T1 that electric power is supplied to the load C1 to a second duration T2 that no electric power is supplied and load C1 is floated is altered according to the first error suppression signal.

Abstract: Output signal waveform having high input signal reproducibility is outputted from inductive load or the like. Output signals V1a and V1b obtained by feeding back an output signal Vp-n1 at output terminals 50 and 51 across load L1 to input terminals 9a and 9b are compared with an input signal Vin to detect an error between signals; a first error suppression signal Vout1 is produced such that the detected error between the signals is suppressed; inclination of first error suppression signal Vout1 is detected, and a second error suppression signal Vout2 is produced such that inclination error to input signal Vin is suppressed based on the detected inclination signal; and the ratio between the period that electric power is supplied to the load L1 and the period that electric power is not supplied to the load L1 is modified according to the error of the error suppression signal.