Patents by Inventor Toshio Shirakihara

Toshio Shirakihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5907673
    Abstract: A computer system which can achieve rollback operation when a fault occurs in the system without waiting for side-tracking of pre-update data during updating of a file. When a file write request has been made, "file writing information" pertaining to the file write is saved in a pending queue and only a primary file is immediately updated. After a checkpoint has been acquired, the "file writing information" saved in the pending queue is shifted to a confirmed queue, and is then written to a back-up file. When performing recovery, all pre-update data which corresponds to the data which has been updated since the last checkpoint acquired is read from the back-up file, based on the "file writing information" saved in the pending queue. The primary file is then restored to its state at the checkpoint time by using the pre-update data which has been read from the backup file.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: May 25, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Hirayama, Toshio Shirakihara
  • Patent number: 5802267
    Abstract: A scheme for checkpointing and a computer system capable of realizing the distributed checkpointing for processes which carry out the inter-process communications, while shortening a stopping time of the processes due to the distributed checkpointing. The inter-process communications of each process are stopped while continuing the normal processing of each process first, and a checkpointing processing for each process is executed when the inter-process communications of all processes are stopped. Alternatively, the inter-computer type inter-process communications of each process are stopped while continuing the intra-computer type inter-process communications and the normal processing of each process first, and a checkpointing processing for each process is executed while stopping the intra-computer type inter-process communications of each process when the inter-computer type inter-process communications of all processes are stopped.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: September 1, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshio Shirakihara, Tatsunori Kanai, Hideaki Hirayama
  • Patent number: 5778179
    Abstract: A flexible distributed processing system capable of dealing with sophisticated conditions for selecting a server process. In the system, each of the services provided by all server processes is registered in the service manager in correspondence with an executability condition for judging whether each service is executed, such that the service manager selects one of the server processes which is providing the desired service indicated by the inquiry transmitted from the client process and which is judged to be executable according to the executability condition registered at the service manager, and the client process requests the desired service the selected one of the server processes. The system can utilize a transaction processing for a nested transaction in which a commit processing for the processes of the sub-transactions which are incapable of executing the nested transaction, is completed concurrently with a completion of the commit processing for the top level transaction.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: July 7, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori Kanai, Toshio Shirakihara
  • Patent number: 5600596
    Abstract: A data access scheme for realizing a fast data writing into the secondary memory device. For a plurality of data present in a plurality of blocks provided in a secondary memory device, one of a plurality of blocks is selected as a writing block, each updated data is written into a region in the primary memory device corresponding to an invalid data portion in the selected writing block, and the writing block with each updated written is stored from the primary memory device into the secondary memory device.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: February 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshio Shirakihara
  • Patent number: 5553241
    Abstract: A connection-oriented communication system capable of realizing the communication path re-establishment automatically, without requiring the programming of the procedures for the re-establishment of the communication path in the mutually communicating programs.
    Type: Grant
    Filed: August 27, 1993
    Date of Patent: September 3, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshio Shirakihara
  • Patent number: 5511192
    Abstract: A method and an apparatus for managing thread private data in which the thread private data can be declared globally and which can deal with the change of the number of threads. The thread private data to be globally accessible from the multiple threads and to be managed separately by each one of the multiple threads are detected before the actual execution of the program, and a thread private data region for managing all the detected thread private data is allocated to the stack for each one of the multiple threads separately. Then, a pointer to specify a base address of the thread private data region with respect to the stack for each one of the multiple threads is registered separately, such that while executing one of the multiple threads, accesses to the thread private data are made by making accesses to the thread private data region in the stack for that one of the multiple threads according to the base address specified by the pointer registered for that one of the multiple threads.
    Type: Grant
    Filed: November 30, 1992
    Date of Patent: April 23, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshio Shirakihara