Abstract: A filter circuit uses a reversible counter to eliminate noise from an input signal which changes between high and low levels. The input signal is sampled in response to a clock signal of selected frequency and the reversible counter is incremented by a sampled value at the high level and decremented by a sampled value at a low level. A hysteresis is built into the counting sequence by jumping the count by a predetermined value when the count is incremented over a first threshold value or decremented below a second threshold value.

Abstract: In cyclically executing the sequence, a signal that informs the controller of the occurrence of a interrupt factor is input to an external signal input terminal. When there are many interrupt factors, it is necessary to quickly analyze the interrupt factors. In this invention, the external signal input terminal is divided into a plurality of blocks, and at least one block is further divided into a plurality of groups. When there develops even one interrupt factor, the data thereof is readily transmitted to a basic unit, and the block in which the interrupt factor has developed raises a flag to inform the controller of this fact. Upon receipt of the above data, the basic unit successively looks for the flags in the blocks. When a flag is detected, the basic unit then successively examines a group that has issued a signal that informs the controller of the occurrence of the interrupt factor in the block in which the flag was found.

Abstract: A programmable sequence controller has indicator lamps for displaying the status of the respective input and output signals. The indicator lamps are respectively coupled with signal input and output terminals through a connector, and are included as in a panel which cover the front surface of the signal input and output terminals.

Abstract: Data processing between selected I/O terminals is switched between processing by direct access to the I/O terminals and processing by indirect access through an image memory having a one-to-one correspondence to the I/O terminals.

Abstract: The states of the signals inputted to a programmable sequence controller or outputted from the programmable sequence controller are stored by a few scanning operations. A check is made to see if a combination of input and output signals which cannot be generated during one scanning operation in the normal operating mode exists in that memory content or not, thereby investigating causes of the occurrence of abnormalities.