Patents by Inventor Toshitaka Shimamoto
Toshitaka Shimamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170227Abstract: A power storage device of the present disclosure includes: a power storage element; a case that houses the power storage element, the case having a bottomed tubular shape and including an opening at one end of the case; and a sealing body that seals the opening. The case includes a first pressing part and a second pressing part in a vicinity of the opening. The first pressing part presses a side surface of the sealing body and protrudes to an inside of the case, and the second pressing part presses an upper surface of the sealing body. The sealing body includes a slit on the upper surface of the sealing body. The slit extends radially inward of the case with respect to the second pressing part and opens at the side surface of the sealing body.Type: ApplicationFiled: December 20, 2021Publication date: May 23, 2024Inventors: TOSHITAKA KOBAYASHI, HIROKI HAYASHI, EIKO ISHII, HIDEKI SHIMAMOTO, RYOTA MORIOKA
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Patent number: 8981340Abstract: A nitride semiconductor device according to the present invention includes a p-type nitride semiconductor layer, an n-type nitride semiconductor layer, and an active layer interposed between the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. The p-type nitride semiconductor layer includes: a first p-type nitride semiconductor layer containing Al and Mg; and a second p-type nitride semiconductor layer containing Mg. The first p-type nitride semiconductor layer is located between the active layer and the second p-type nitride semiconductor layer, and the second p-type nitride semiconductor layer has a greater band gap than a band gap of the first p-type nitride semiconductor layer.Type: GrantFiled: April 4, 2013Date of Patent: March 17, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yasutoshi Kawaguchi, Toshitaka Shimamoto, Akihiko Ishibashi, Isao Kidoguchi, Toshiya Yokogawa
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Publication number: 20110292959Abstract: A semiconductor laser device includes a semiconductor laminated film including a ridge stripe portion. The semiconductor laminated film includes a first scribed level-different portion formed in a resonator surface which is an edge surface thereof intersecting the ridge stripe portion and a second scribed level-different portion formed in each side surface thereof extending in parallel to the ridge stripe portion, the first scribed level-difference portion is located between the second scribed level-different portion and the ridge stripe portion, a cross-sectional shape of the first scribe level-different portion taken along the resonator surface is polygonal, and one of angles of inclined parts which is located closer to an associated one of the ridge stripe portions is smaller than the other one of the angles located closer to an associated one of the second scribed portions, the inclined parts being sides of the polygonal shape.Type: ApplicationFiled: February 18, 2011Publication date: December 1, 2011Inventors: Toshitaka Shimamoto, Naoto Shimada, Kouji Makita, Yoshiaki Hasegawa
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Publication number: 20110272670Abstract: A nitride semiconductor device according to the present invention includes a p-type nitride semiconductor layer, an n-type nitride semiconductor layer, and an active layer interposed between the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. The p-type nitride semiconductor layer includes: a first p-type nitride semiconductor layer containing Al and Mg; and a second p-type nitride semiconductor layer containing Mg. The first p-type nitride semiconductor layer is located between the active layer and the second p-type nitride semiconductor layer, and the second p-type nitride semiconductor layer has a greater band gap than a band gap of the first p-type nitride semiconductor layer.Type: ApplicationFiled: June 16, 2011Publication date: November 10, 2011Inventors: Yasutoshi KAWAGUCHI, Toshitaka SHIMAMOTO, Akihiko ISHIBASHI, Isao KIDOGUCHI, Toshiya YOKOGAWA
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Patent number: 7846820Abstract: A process for producing a nitride semiconductor according to the present invention includes: step (A) of provided an n-GaN substrate 101; step (B) of forming on the substrate 101 a plurality of stripe ridges having upper faces which are parallel to a principal face of the substrate 101; step (C) of selectively growing AlxGayInzN crystals (0?x, y, z?1: x+y+z=1) 104 on the upper faces of the plurality of stripe ridges, the AlxGayInzN crystals containing an n-type impurity at a first concentration; and step (D) of growing an Alx?Gay?Inz?N crystal (0?x?, y?, z??1:x?+y?+z?=1) 106 on the AlxGayInzN crystals 104, the Alx?Gay?Inz?N crystal 106 containing an n-type impurity at a second concentration which is lower than the first concentration, and linking every two adjoining AlxGayInzN crystals 104 with the Alx?Gay?Inz?N crystal 106 to form one nitride semiconductor layer 120.Type: GrantFiled: April 20, 2005Date of Patent: December 7, 2010Assignee: Panasonic CorporationInventors: Akihiko Ishibashi, Toshiya Yokogawa, Toshitaka Shimamoto, Yoshiaki Hasegawa, Yasutoshi Kawaguchi, Isao Kidoguchi
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Patent number: 7704860Abstract: A nitride-based semiconductor device according to the present invention includes a semiconductor multilayer structure supported on a substrate structure 101 with electrical conductivity. The principal surface of the substrate structure 101 has at least one vertical growth region, which functions as a seed crystal for growing a nitride-based semiconductor vertically, and a plurality of lateral growth regions for allowing the nitride-based semiconductor that has grown on the vertical growth region to grow laterally. The sum ?X of the respective sizes of the vertical growth regions as measured in the direction pointed by the arrow A and the sum ?Y of the respective sizes of the lateral growth regions as measured in the same direction satisfy the inequality ?X/?Y>1.0.Type: GrantFiled: November 15, 2005Date of Patent: April 27, 2010Assignee: Panasonic CorporationInventors: Toshitaka Shimamoto, Yasutoshi Kawaguchi, Yoshiaki Hasegawa, Akihiko Ishibashi, Isao Kidoguchi, Toshiya Yokogawa
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Publication number: 20100025850Abstract: The present invention includes an AuGeNi alloy layer (13) provided on an n-type GaAs layer; and a laminate provided on the AuGeNi alloy layer (13), the laminate being composed of a bonding metal layer (15, 17) and a barrier metal layer (16, 18) provided on the bonding metal layer (15, 17). The present invention includes two or more of the laminates. With this configuration, in a GaAs-based contact layer, particularly in an n-type electrode, the surface diffusion of Ga of the semiconductor and Ni of the AuGeNi alloy, which is needed to form an ohmic contact in the n-type electrode, can be suppressed, and a low-resistance ohmic electrode structure and a semiconductor element having the ohmic electrode structure can be provided.Type: ApplicationFiled: February 21, 2008Publication date: February 4, 2010Applicant: PANASONIC CORPORATIONInventors: Toshitaka Shimamoto, Kenji Yoshikawa, Kouji Makita
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Publication number: 20080272462Abstract: A nitride-based semiconductor device according to the present invention includes a semiconductor multilayer structure supported on a substrate structure 101 with electrical conductivity. The principal surface of the substrate structure 101 has at least one vertical growth region, which functions as a seed crystal for growing a nitride-based semiconductor vertically, and a plurality of lateral growth regions for allowing the nitride-based semiconductor that has grown on the vertical growth region to grow laterally. The sum ?X of the respective sizes of the vertical growth regions as measured in the direction pointed by the arrow A and the sum ?Y of the respective sizes of the lateral growth regions as measured in the same direction satisfy the inequality ?X/?Y>1.0.Type: ApplicationFiled: November 15, 2005Publication date: November 6, 2008Inventors: Toshitaka Shimamoto, Yasutoshi Kawaguchi, Yoshiaki Hasegawa, Akihiko Ishibashi, Isao Kidoguchi, Toshiya Yokogawa
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Publication number: 20070290230Abstract: A nitride semiconductor device according to the present invention includes a p-type nitride semiconductor layer, an n-type nitride semiconductor layer, and an active layer interposed between the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. The p-type nitride semiconductor layer includes: a first p-type nitride semiconductor layer containing Al and Mg; and a second p-type nitride semiconductor layer containing Mg. The first p-type nitride semiconductor layer is located between the active layer and the second p-type nitride semiconductor layer, and the second p-type nitride semiconductor layer has a greater band gap than a band gap of the first p-type nitride semiconductor layer.Type: ApplicationFiled: September 24, 2004Publication date: December 20, 2007Inventors: Yasutoshi Kawaguchi, Toshitaka Shimamoto, Akihiko Ishibashi, Isao Kidoguchi, Toshiya Yokogawa
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Publication number: 20070217460Abstract: A process for producing a nitride semiconductor according to the present invention includes: step (A) of provided an n-GaN substrate 101; step (B) of forming on the substrate 101 a plurality of stripe ridges having upper faces which are parallel to a principal face of the substrate 101; step (C) of selectively growing AlxGayInzN crystals (0?x, y, z?1: x+y+z=1) 104 on the upper faces of the plurality of stripe ridges, the AlxGayInzN crystals containing an n-type impurity at a first concentration; and step (D) of growing an Alx?Gay?Inz?N crystal (0?x?, y?, z??1: x?+y?+z?=1) 106 on the AlxGayInzN crystals 104, the Alx?Gay?Inz?N crystal 106 containing an n-type impurity at a second concentration which is lower than the first concentration, and linking every two adjoining AlxGayInzN crystals 104 with the Alx?Gay?Inz?N crystal 106 to form one nitride semiconductor layer 120.Type: ApplicationFiled: April 20, 2005Publication date: September 20, 2007Inventors: Akihiko Ishibashi, Toshiya Yokogawa, Toshitaka Shimamoto, Yoshiaki Hasegawa, Yasutoshi Kawaguchi, Isao Kidoguchi
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Patent number: 7160748Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: GrantFiled: February 24, 2005Date of Patent: January 9, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Publication number: 20060239321Abstract: A semiconductor laser device includes a first semiconductor laser element for emitting a first laser light having a first oscillation wavelength of ?1 and a second semiconductor laser element for emitting a second laser light having a second oscillation wavelength of ?2 (wherein ?2??1), which are formed on a single substrate. A first dielectric film which has a refractive index of n1 with respect to a wavelength ? between the first oscillation wavelength ?1 and the second oscillation wavelength ?2 and has a film thickness of approximately ?/(8n1) is formed at light emitting facets in the first semiconductor laser element and the second semiconductor laser element, from which the laser lights are emitted, and a second dielectric film having a refractive index of n2 and a film thickness of ?/(8n2) are formed on the first dielectric film.Type: ApplicationFiled: January 9, 2006Publication date: October 26, 2006Inventors: Masahiro Kume, Toshitaka Shimamoto, Isao Kidoguchi, Tomoaki Uno
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Patent number: 6958493Abstract: A method for fabricating a semiconductor light emitting device, the method comprising the steps of: repeatedly forming, on a first nitride based Group III–V compound semiconductor layer, stripe-shaped masking films in a predetermined cycle in a width-wise direction thereof, each masking film comprising first width sections having a predetermined width and second width sections which are adjacent to both ends of each first width section and have a greater width than the predetermined width; selectively growing a second nitride based Group III–V compound semiconductor layer from exposed parts of a surface of the first nitride based Group III–V compound semiconductor so as to cover the masking films and the exposed parts, each of the exposed parts being located between the masking films; and layering a semiconductor laser structure on the second nitride based Group III–V compound semiconductor layer, the semiconductor laser structure including an active layer which substantially extends in a length-wise directioType: GrantFiled: March 17, 2005Date of Patent: October 25, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiaki Hasegawa, Toshitaka Shimamoto, Gaku Sugahara
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Patent number: 6921678Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: GrantFiled: May 9, 2003Date of Patent: July 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Publication number: 20050156190Abstract: A method for fabricating a semiconductor light emitting device, the method comprising the steps of: repeatedly forming, on a first nitride based Group III-V compound semiconductor layer, stripe-shaped masking films in a predetermined cycle in a width-wise direction thereof, each masking film comprising first width sections having a predetermined width and second width sections which are adjacent to both ends of each first width section and have a greater width than the predetermined width; selectively growing a second nitride based Group III-V compound semiconductor layer from exposed parts of a surface of the first nitride based Group III-V compound semiconductor so as to cover the masking films and the exposed parts, each of the exposed parts being located between the masking films; and layering a semiconductor laser structure on the second nitride based Group III-V compound semiconductor layer, the semiconductor laser structure including an active layer which substantially extends in a length-wise directioType: ApplicationFiled: March 17, 2005Publication date: July 21, 2005Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Yoshiaki Hasegawa, Toshitaka Shimamoto, Gaku Sugahara
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Publication number: 20050142682Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: ApplicationFiled: February 24, 2005Publication date: June 30, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Patent number: 6884648Abstract: A method for fabricating a semiconductor light emitting device, the method comprising the steps of: repeatedly forming, on a first nitride based Group III-V compound semiconductor layer, stripe-shaped masking films in a predetermined cycle in a width-wise direction thereof, each masking film comprising first width sections having a predetermined width and second width sections which are adjacent to both ends of each first width section and have a greater width than the predetermined width; selectively growing a second nitride based Group III-V compound semiconductor layer from exposed parts of a surface of the first nitride based Group III-V compound semiconductor so as to cover the masking films and the exposed parts, each of the exposed parts being located between the masking films; and layering a semiconductor laser structure on the second nitride based Group III-V compound semiconductor layer, the semiconductor laser structure including an active layer which substantially extends in a length-wise directioType: GrantFiled: October 20, 2003Date of Patent: April 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiaki Hasegawa, Toshitaka Shimamoto, Gaku Sugahara
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Publication number: 20040115847Abstract: A method for fabricating a semiconductor light emitting device, the method comprising the steps of: repeatedly forming, on a first nitride based Group III-V compound semiconductor layer, stripe-shaped masking films in a predetermined cycle in a width-wise direction thereof, each masking film comprising first width sections having a predetermined width and second width sections which are adjacent to both ends of each first width section and have a greater width than the predetermined width; selectively growing a second nitride based Group III-V compound semiconductor layer from exposed parts of a surface of the first nitride based Group III-V compound semiconductor so as to cover the masking films and the exposed parts, each of the exposed parts being located between the masking films; and layering a semiconductor laser structure on the second nitride based Group III-V compound semiconductor layer, the semiconductor laser structure including an active layer which substantially extends in a length-wise directioType: ApplicationFiled: October 20, 2003Publication date: June 17, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiaki Hasegawa, Toshitaka Shimamoto, Gaku Sugahara
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Publication number: 20030203629Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a-first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: ApplicationFiled: May 9, 2003Publication date: October 30, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Patent number: 6586774Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: GrantFiled: December 19, 2001Date of Patent: July 1, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka