Patents by Inventor Toshitaka Tsuda

Toshitaka Tsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180034905
    Abstract: A terminal network apparatus performs wireless communication with a user terminal apparatus. The terminal network apparatus receives a registration request which is transmitted from the user terminal apparatus, and assigns a node name to the user terminal apparatus. The terminal network apparatus receives a reregistration request from a user terminal apparatus which has moved from a wireless service area of another terminal network apparatus, and assigns a new node name to the user terminal apparatus. The terminal network apparatus transmits a notification that includes an old node name and the new node name to the terminal network apparatus that had assigned the old node name. When the terminal network apparatus receives the notification, the terminal network apparatus generates an entry, in which the old node name and the new node name are correlated, in a node name pair table.
    Type: Application
    Filed: August 17, 2017
    Publication date: February 1, 2018
    Applicant: WASEDA UNIVERSITY
    Inventors: Takuro Sato, Toshitaka Tsuda, Wataru Kameyama, Jiro Katto, Lopez Nacarino
  • Patent number: 5056121
    Abstract: A circuit for obtaining accurate timing information from a received signal, first, obtains an impulse response at a certain phase, which phase is determined based on a reference phase of a receiver clock, and then the obtained impulse response is compared with a reference level. As the reference level: a predetermined value just below the maximum value of the overall impulse response; an impulse response at another phase; or an impulse response at the same phase in a previous period, is used. The reference phase is controlled, according to the result of the comparison.
    Type: Grant
    Filed: March 20, 1989
    Date of Patent: October 8, 1991
    Assignee: Fujitsu Limited
    Inventors: Shinji Ohta, Misao Fukuda, Toshitaka Tsuda
  • Patent number: 4771439
    Abstract: A differential coding circuit including a subtracter, a quantizer for quantizing a differential signal from the subtracter, and a predicted signal generating circuit for generating a predicted signal on the basis of a quantized differential signal from the quantizer. The subtracter subtracts the quantized differential signal of the quantizer and the predicted signal from the sampled input signal. The critical path of the circuit is shortened, therefore the operation speed of the differential coding circuit increases.
    Type: Grant
    Filed: May 12, 1987
    Date of Patent: September 13, 1988
    Assignee: Fujitsu Limited
    Inventors: Takeshi Okazaki, Toshitaka Tsuda, Shin-ichi Maki, Kiichi Matsuda, Hirohisa Gambe, Hirokazu Fukui, Toshi Ikezawa
  • Patent number: 4679188
    Abstract: A digital transmission system comprising at least two transmitting-receiving (T/R) units and a single transmission line connected therebetween. One of the T/R units the first transmits a control signal to the other T/R units with which frame synchronization and timing recovery are carried out using the transmitted control signal. At the same time, the other T/R unit inhibits transmission of send signal therefrom to the first T/R unit. Further, the send signal from one T/R unit to the other T/R unit is transmitted in the form of a frame. Each frame includes, at its end portion, a non-signal duration portion.
    Type: Grant
    Filed: September 24, 1985
    Date of Patent: July 7, 1987
    Assignee: Fujitsu Limited
    Inventors: Misao Fukuda, Toshitaka Tsuda, Kazuo Murano, Yutaka Awata
  • Patent number: 4668987
    Abstract: An apparatus for band compression processing of a picture signal which generates forecasting error signal and movement vector and updates only the movement vector during a comb-out operation. During comb-out processing, a picture signal is recirculated while the movement vector is produced and accumulated. At the end of the comb-out processing, the change in the movement vector from the accumulated vector is within a desired range. Therefore, the scale of a circuit for detecting the movement vector after the comb-out operation does not increase.
    Type: Grant
    Filed: March 11, 1985
    Date of Patent: May 26, 1987
    Assignee: Fujitsu Limited
    Inventors: Kiichi Matsuda, Toshitaka Tsuda, Toshihiro Homma, Hiroshi Fukuda, Takeshi Okazaki, Shin-ichi Maki
  • Patent number: 4651033
    Abstract: A differential switching circuit includes a first current switching circuit having a first input terminal; a second current switching circuit having a second input terminal and a threshold different from that of the first circuit; and a constant current source commonly connected to the first and second circuits. Complementary input signals are applied to the first and second input terminals.
    Type: Grant
    Filed: January 27, 1984
    Date of Patent: March 17, 1987
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Yasutake, Toshitaka Tsuda
  • Patent number: 4363977
    Abstract: A device for discriminating between two values of a signal using DC offset compensation including an automatic gain control circuit, a peak detector circuit and a feedback path from the peak detector circuit to the input circuit of the automatic gain control circuit. The value of the feedback current is regulated so that the maximum value of one of the same polarity signals and the opposite polarity signal coincides with the minimum value of the other of the two signals.
    Type: Grant
    Filed: February 20, 1981
    Date of Patent: December 14, 1982
    Assignee: Fujitsu Limited
    Inventors: Toshitaka Tsuda, Kazuo Murano, Kazuo Yamaguchi, Takafumi Chujo, Norio Murakami, Motohide Takahashi
  • Patent number: 4347617
    Abstract: An asynchronous transmission system for binary-coded information is disclosed. According to this system, in a transmitting terminal (A), when successive data of the same code in a set of asynchronous data lasts for a predetermined period of time (T.sub.1), a refresh pulse, the polarity of which is opposite to that of the successive data, is added to a transmission signal. However, the addition of such a refresh pulse to the transmission signal is inhibited for a predetermined period of time (T.sub.2) to allow for a change of data. In a receiving terminal (B), a pulse, the width of which is larger or equal to a minimum period of data, and a pulse, the width of which is smaller than or equal to a pulse-width (T.sub.0) of a refresh pulse, can be discriminated and removed by a pulse-width discrimination circuit. As a result, the refresh pulse is not present in the output signal of the pulse-width discrimination circuit. Thus, the original asynchronous data is restored.
    Type: Grant
    Filed: November 26, 1980
    Date of Patent: August 31, 1982
    Assignee: Fujitsu Limited
    Inventors: Kazuo Murano, Kazuo Yamaguchi, Norio Murakami, Toshitaka Tsuda
  • Patent number: 4194243
    Abstract: A data processing system for reading or writing data comprises a data memory unit and a processing unit, the data to be read from or written to the data memory unit is being serially transferred bit by bit over a single line connected between the data memory unit and the processing unit. The processing unit is operated in accordance with an instruction specified by instruction addressing information which is produced by an instruction counter. The data is specified by data addressing information which is produced by a means for specifying the address of the data memory unit. Both the lower bits of the data addressing information and the lower bits of the instruction addressing information are jointly produced by the lower bit stages of the instruction counter. The upper bits of the data addressing information are momentarily stored in an upper bits specifying register during one read or write operation while one execution of one data bit data is performed.
    Type: Grant
    Filed: April 14, 1977
    Date of Patent: March 18, 1980
    Assignee: Fujitsu Limited
    Inventor: Toshitaka Tsuda