Patents by Inventor Toshiya Kiyota

Toshiya Kiyota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120324028
    Abstract: Disclosed is a terminal device which automatically attaches an email address, capable of transmitting and receiving text messages conforming to Short Message Service (SMS) and transmitting and receiving electronic mail, which stores the email address of the terminal device which automatically attaches an email address. The terminal device accepts commands from a user. If the terminal device detects from the content of received commands that a text message conforming to SMS is being generated, it acquires the email address and inserts the acquired email address into the generated text message. After the insertion is completed, it transmits the generated text message to the other terminal.
    Type: Application
    Filed: February 23, 2011
    Publication date: December 20, 2012
    Applicant: NEC CORPORATION
    Inventor: Toshiya Kiyota
  • Patent number: 8085355
    Abstract: A structure of a plurality of thin film transistors wherein a peripheral circuit on a glass substrate of a liquid crystal display panel; and each of polycrystalline silicon thin film 13 of the thin film transistor is formed on the glass substrate; and each of gate electrode 15 is formed on a gate insulation layer, and each of the gate electrode 15 is overhead corresponding to the polycrystalline silicon thin film 13 for a channel; wherein the gate electrode 15 is comprised a pair of projection part 15A and a gate-channel 15B; and wherein the pair of projection part 15A is formed the both sides of the gate-channel 15B in which the side is for along the channel-direction, and wherein the pair of projection part 15A is enlarged for across the channel-direction.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: December 27, 2011
    Assignee: Toshiba Mobile Display Co., Ltd.
    Inventors: Hajime Watakabe, Masato Hiramatsu, Toshiya Kiyota, Mikio Murata, Masaki Kado, Arichika Ishida, Yoshiaki Nakazaki
  • Publication number: 20100110322
    Abstract: A structure of a plurality of thin film transistors wherein a peripheral circuit on a glass substrate of a liquid crystal display panel; and each of polycrystalline silicon thin film 13 of the thin film transistor is formed on the glass substrate; and each of gate electrode 15 is formed on a gate insulation layer, and each of the gate electrode 15 is overhead corresponding to the polycrystalline silicon thin film 13 for a channel; wherein the gate electrode 15 is comprised a pair of projection part 15A and a gate-channel 15B; and wherein the pair of projection part 15A is formed the both sides of the gate-channel 15B in which the side is for along the channel-direction, and wherein the pair of projection part 15A is enlarged for across the channel-direction.
    Type: Application
    Filed: August 25, 2009
    Publication date: May 6, 2010
    Inventors: Hajime WATAKABE, Masato Hiramatsu, Toshiya Kiyota, Mikio Murata, Masaki Kado, Arichika Ishida, Yoshiaki Nakazaki
  • Patent number: 6426494
    Abstract: An optical signal and an optical signal detecting method in which the difference between the outputs of a first photodetector and a second photodetector is taken to generate a differential signal by differential output mean. The photoelectric conversion efficiency of the second photodetector is varied in accordance with the difference in photoelectric conversion efficiency between the first and second photodetectors by a control device.
    Type: Grant
    Filed: January 4, 2000
    Date of Patent: July 30, 2002
    Assignee: NEC Corporation
    Inventor: Toshiya Kiyota
  • Patent number: 5712494
    Abstract: A thin film field effect transistor has a hate electrode formed on a glass substrate and a gate insulation film. A channel region, formed of a semiconductor layer, is provided to be opposite to the gate electrode through the gate insulation film, and a pair of source/drain regions, formed of a n-type semiconductor layer, is provided to sandwich the channel region therebetween. An insulation channel protection layer is formed on the channel region. A silicide layer is formed on the source/drain regions, and source/drain electrodes comes in contact therewith. The drain electrode of the source/drain electrodes has an electrode extension portion extending onto the channel protection layer, and being opposite to the channel region through the channel protection layer.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: January 27, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Akiyama, Yoshimi Ikeda, Toshiya Kiyota
  • Patent number: 5610737
    Abstract: A TFT includes a channel region provided on a substrate and having on the both sides a pair of source region and a drain region formed of an amorphous semiconductor layer, a gate electrode provided above or below the channel region through a gate insulating layer, and wiring electrodes which contact the source region and the drain region directly or indirectly, and wherein a surface portion of the source region and drain region contacting the wiring electrodes directly or indirectly comprises a semiconductor layer containing crystalline structure. By this structure, a thin film transistor can be obtained capable of operating at high speed with high drive capability.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: March 11, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Akiyama, Toshiya Kiyota, Yoshimi Ikeda
  • Patent number: 5296653
    Abstract: A multi-layered conductor structure device has a substrate, a first conductor layer formed on the substrate, which provides an electrode or wiring, and an insulating film covering the first conductor layer and the substrate. On the insulating film, a second conductor layer is formed which comprises an indium tin oxide, and which provides an electrode or wiring. The first conductor layer is formed of an alloy of aluminum with copper, gold, boron, bismuth, cobalt, chromium, germanium, iron, molybdenum, niobium, nickel, palladium, platinum, tantalum, titanium, tungsten, and/or silver.
    Type: Grant
    Filed: December 9, 1992
    Date of Patent: March 22, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiya Kiyota, Mitsushi Ikeda, Meiko Ogawa, Yoshifumi Ogawa, Michio Murooka