Abstract: As for the method that modulates optical path length by the position of reflection plane of light, the movement of the position-movable plate in micrometer-size electromechanical device can be restricted by the stopping plates placed above and below the edge of the position-movable plate, the distance between the stopping plates may be set depending on the desired amount in modulating the optical path length. The voltage differential in the device is operable to create electrostatic attraction, to perform transition movement of the position-movable plate between the stopping plates, the light reflector connected to the position-movable plate takes at least two states in positioning, enabling to modulate the optical path length of reflected light by the light reflector with high reproducibility and high accuracy.

Abstract: As for the method that modulates optical path length by the position of reflection plane of light, the movement of the position-movable plate in micrometer-size electromechanical device can be restricted by the stopping plates placed above and below the edge of the position-movable plate, the distance between the stopping plates may be set depending on the desired amount in modulating the optical path length. The voltage differential in the device is operable to create electrostatic attraction, to perform transition movement of the position-movable plate between the stopping plates, the light reflector connected to the position-movable plate takes at least two states in positioning, enabling to modulate the optical path length of reflected light by the light reflector with high reproducibility and high accuracy.

Abstract: A system and method for regulating micromirror position in a digital micromirror device. The system and method adjusts micromirror operating temperature and/or a reset sequence of the micromirror by determining a desired tilt angle, adjusting voltage potentials of signals in a reference reset sequence, and saving the adjusted reset sequence. The adjustments are used to alter a voltage potential difference between micromirrors of the digital micromirror device and respective address lines, thereby allowing for a precise regulation of a tilt angle of the micromirrors. Additionally, the operating temperature of the digital micromirror device may also be controlled to regulate micromirror position. The precise control of the tilt angle of the micromirrors permits the use of digital micromirror devices in systems requiring fine focus and increased focus depth, such as photolithography and holography.

Abstract: A system and method for regulating micromirror position in a digital micromirror device. The system and method adjusts micromirror operating temperature and/or a reset sequence of the micromirror by determining a desired tilt angle, adjusting voltage potentials of signals in a reference reset sequence, and saving the adjusted reset sequence. The adjustments are used to alter a voltage potential difference between micromirrors of the digital micromirror device and respective address lines, thereby allowing for a precise regulation of a tilt angle of the micromirrors. Additionally, the operating temperature of the digital micromirror device may also be controlled to regulate micromirror position. The precise control of the tilt angle of the micromirrors permits the use of digital micromirror devices in systems requiring fine focus and increased focus depth, such as photolithography and holography.

Abstract: Device and method for a damping function to reduce undesirable mechanical transient responses to control signals. In one aspect of the present invention, the damping function may be used to reduce overshoot and oscillation when a digital micromirror is driven from a landing plate to the flat or neutral position. In another aspect of the present invention, the damping function may be used to reduce transient resonance of a digital micromirror when the micromirror is driven to a landing plate.

Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.

Abstract: A method of fabricating a micromechanical device. Several of the micromechanical devices are fabricated 20 on a common wafer. After the devices are fabricated, the sacrificial layers are removed 22 leaving open spaces where the sacrificial layers once were. These open spaces allow for movement of the components of the micromechanical device. The devices optionally are passivated 24, which may include the application of a lubricant. After the devices have been passivated, they are tested 26 in wafer form. After testing 26, any surface treatments that are not compatible with the remainder of the processing steps are removed 28. The substrate wafer containing the completed devices receives a conformal overcoat 30. The overcoat layer is thick enough to project the micromechanical structures, but thin and light enough to prevent deforming the underlying micromechanical structures.

Abstract: Device and method for a damping function to reduce undesirable mechanical transient responses to control signals. In one aspect of the present invention, the damping function may be used to reduce overshoot and oscillation when a digital micromirror is driven from a landing plate to the flat or neutral position. In another aspect of the present invention, the damping function may be used to reduce transient resonance of a digital micromirror when the micromirror is driven to a landing plate.

Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.

Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.

Abstract: To suppress undesired scattered light and leaking light so as to improve the optical function and reliability. In this DMD, as the address circuit of one cell, SRAM 12 is formed monolithically on the principal surface of silicon substrate 10, and, on said SRAM 12, reflective digital optical switch or optical modulating element 16 is formed monolithically as one cell made of three layers of a metal, such as aluminum, via oxide film 14. Each reflective optical modulating element 16 has bias bus 18 and yoke address electrodes 20, 22 as the first metal layer, torsional hinge 24, hinge supporting portions 26, 28, yoke 30, and mirror address electrodes 32, 34 as the second metal layer, and mirror 36 as the third metal layer. Optical absorptive and nonconductive film 40 is formed to cover a portion or all of the first metal layer and to cover underlying film (insulating film) 14. In addition, said film 40 is formed to bury hole formed on the surface of the third metal layer.

Abstract: A method of fabricating a DRAM integrated circuit structure (30) and the structure so formed, in which a common interconnect material (42, 48) is used as a first level interconnection layer in both an array portion (30a) and periphery portion (30p) is disclosed. The interconnect material (42, 48) consists essentially of titanium nitride, and is formed by direct reaction of titanium metal (40) in a nitrogen ambient. Titanium silicide (44) is formed at each contact location (CT, BLC) as a result of the direct react process. Storage capacitor plates (16, 18) and the capacitor dielectric (17) are formed over the interconnect material (42, 48), due to the thermal stability of the material. Alternative processes of forming the interconnect material (42, 48) are disclosed, to improve step coverage.

Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.

Abstract: A method of fabricating a micromechanical device. Several of the micromechanical devices are fabricated 20 on a common wafer. After the devices are fabricated, the sacrificial layers are removed 22 leaving open spaces where the sacrificial layers once were. These open spaces allow for movement of the components of the micromechanical device. The devices optionally are passivated 24, which may include the application of a lubricant. After the devices have been passivated, they are tested 26 in wafer form. After testing 26, any surface treatments that are not compatible with the remainder of the processing steps are removed 28. The substrate wafer containing the completed devices receives a conformal overcoat 30. The overcoat layer is thick enough to project the micromechanical structures, but thin and light enough to prevent deforming the underlying micromechanical structures.

Abstract: To suppress undesired scattered light and leaking light so as to improve the optical function and reliability. In this DMD, as the address circuit of one cell, SRAM 12 is formed monolithically on the principal surface of silicon substrate 10, and, on said SRAM 12, reflective digital optical switch or optical modulating element 16 is formed monolithically as one cell made of three layers of a metal, such as aluminum, via oxide film 14. Each reflective optical modulating element 16 has bias bus 18 and yoke address electrodes 20, 22 as the first metal layer, torsional hinge 24, hinge supporting portions 26, 28, yoke 30, and mirror address electrodes 32, 34 as the second metal layer, and mirror 36 as the third metal layer. Optical absorptive and nonconductive film 40 is formed to cover a portion or all of the first metal layer and to cover underlying film (insulating film) 14. In addition, said film 40 is formed to bury hole formed on the surface of the third metal layer.

Abstract: A method of fabricating a DRAM integrated circuit structure (30) and the structure so formed, in which a common interconnect material (42, 48) is used as a first level interconnection layer in both an array portion (30a) and periphery portion (30p) is disclosed. The interconnect material (42, 48) consists essentially of titanium nitride, and is formed by direct reaction of titanium metal (40) in a nitrogen ambient. Titanium silicide (44) is formed at each contact location (CT, BLC) as a result of the direct react process. Storage capacitor plates (16, 18) and the capacitor dielectric (17) are formed over the interconnect material (42, 48), due to the thermal stability of the material. Alternative processes of forming the interconnect material (42, 48) are disclosed, to improve step coverage.

Abstract: A process for manufacturing micromechanical devices. The process includes the step of covering the activation circuitry (201) and those parts of the device that come in contact with moving parts with a pad film (202). The pad film prevents frictional wear and sticking of the moving parts, and can prevent electrical shorts between different parts of the activation circuitry. Additionally, the pad film can prevent particulates from interfering with the operation of the device.

Abstract: A method of making semiconductor devices which enables control of the impurity concentration and fine patterning by making removal of residual stress due LOCOS oxidation compatible with the formation of deep wells. A selective oxide layer is formed for separating element regions on a principal plane of a semiconductor substrate, for example, a p.sup.- -type silicon substrate 1. A mask is formed (for example photoresist 47) on the surface including the selective oxide layer and impurities (for example phosphorous) of a conductivity type opposite that of the semiconductor substrate are introduced via an opening in the mask. Then the selective oxide film is annealed by a high-temperature treatment while a deep well (for example n-type deep well 50) is formed by introducing the impurities.

Abstract: A method for fabricating DRAMs each having a COB structure, and the semiconductor device formed by this method, are provided. In one embodiment, the word line and/or bit line is covered with an insulating film having a comparatively small etching rate. Contact holes are formed while being defined by those insulating films in self-alignment.

Abstract: A process for manufacturing micromechanical devices. The process includes the step of covering the activation circuitry (201) and those parts of the device that come in contact with moving parts with a pad film (202). The pad film prevents frictional wear and sticking of the moving parts, and can prevent electrical shorts between different parts of the activation circuitry. Additionally, the pad film can prevent particulates from interfering with the operation of the device.