Patents by Inventor Toshiyuki Kikuchi
Toshiyuki Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11170996Abstract: (a) Loading a substrate into a process chamber; (b) supplying a processing gas including H2O-containing radicals to the substrate; (c) supplying a gas including a halogen element; (d) supplying a gas including one or both of an oxygen element and a nitrogen element after (c); and (e) repeating (c) and (d) are provided.Type: GrantFiled: February 13, 2020Date of Patent: November 9, 2021Assignee: KOKUSAI ELECTRIC CORPORATIONInventors: Hiroshi Ashihara, Toshiyuki Kikuchi
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Publication number: 20210296111Abstract: Described herein is a technique capable of forming a film so as to fill an inside of a recess provided on a surface of a substrate. According to one aspect of the technique, there is provided a method of manufacturing a semiconductor device, including: (a) forming a film by performing a cycle a predetermined number of times, the cycle including: (a-1) supplying a gas to a substrate in a process chamber; and (a-2) vacuum-exhausting an inner atmosphere of the process chamber; and (b) generating a predetermined temperature difference between a front surface of the substrate and a back surface of the substrate at a predetermined timing during (a).Type: ApplicationFiled: March 18, 2021Publication date: September 23, 2021Inventors: Takashi YAHATA, Toshiyuki KIKUCHI
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Publication number: 20210249256Abstract: A method of manufacturing a semiconductor device including: (a) loading a substrate into a process chamber; (b) supplying a processing gas including H2O-containing radicals to the substrate; (c) supplying a gas including a halogen element; (d) supplying a gas including one or both of an oxygen element and a nitrogen element after (c); (e) repeating (c) and (d); and (f) repeating (b) and (e).Type: ApplicationFiled: April 1, 2021Publication date: August 12, 2021Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Hiroshi ASHIHARA, Toshiyuki KIKUCHI
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Publication number: 20210210356Abstract: Described herein is a technique capable of forming a film whose characteristics are uniform by discharging a residual component from a plurality of grooves before supplying a process gas. According to one aspect thereof, there is provided a substrate processing apparatus including: (a) loading a substrate on which a plurality of grooves are provided into a process chamber, wherein a residue is adhered to the plurality of the grooves; (b) desorbing the residue from the plurality of the grooves by heating the substrate; and (c) discharging the residue from the plurality of the grooves to a process space of the process chamber after (b) is performed by heating a surface of the substrate to a temperature higher than a temperature of the substrate in (b).Type: ApplicationFiled: January 5, 2021Publication date: July 8, 2021Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Takashi YAHATA, Toshiyuki KIKUCHI
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Patent number: 11037823Abstract: Described herein is a technique capable of providing a semiconductor device having good characteristics. According to the technique described herein, there is provided a method of manufacturing a semiconductor device, including: (a) loading a substrate into a process chamber; and (b) forming a stacked etch stopper film by performing: (b-1) forming a first etch stopper film containing a first element and a second element by supplying a first element-containing gas and a second element-containing gas onto the substrate; and (b-2) forming a second etch stopper film containing the first element, the second element and a third element by supplying the first element-containing gas, the second element-containing gas and a third element-containing gas onto the first etch stopper film.Type: GrantFiled: April 27, 2018Date of Patent: June 15, 2021Assignee: KOKUSAI ELECTRIC CORPORATIONInventors: Tsuyoshi Takeda, Naofumi Ohashi, Toshiyuki Kikuchi
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Publication number: 20200294788Abstract: (a) Loading a substrate into a process chamber; (b) supplying a processing gas including H2O-containing radicals to the substrate; (c) supplying a gas including a halogen element; (d) supplying a gas including one or both of an oxygen element and a nitrogen element after (c) ; and (e) repeating (c) and (d) are provided.Type: ApplicationFiled: February 13, 2020Publication date: September 17, 2020Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Hiroshi ASHIHARA, Toshiyuki KIKUCHI
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Publication number: 20200286731Abstract: There is provided a technique that includes: loading an m-th substrate into a process chamber, wherein m is an integer less than n; forming a film on the m-th substrate by heating the m-th substrate in the process chamber; unloading the m-th substrate from the process chamber; waiting for a predetermined time in the process chamber, in a state where the substrates are not present in the process chamber, after the act of unloading; loading a next substrate, which is one of the n substrates to be processed next, into the process chamber, after the act of waiting; and forming a film on the next substrate by heating the next substrate in the process chamber.Type: ApplicationFiled: March 5, 2020Publication date: September 10, 2020Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Naofumi OHASHI, Toshiyuki KIKUCHI
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Publication number: 20200089196Abstract: There is provided a technique that includes a load port on which a plurality of storage containers, each storage container storing a plurality of substrates, are mounted, a plurality of process chambers configured to be capable of accommodating the substrates, a transfer part configured to transfer the substrates stored in each storage container to each of the process chambers; an operation part configured to, when performing the process in a state in which a substrate is not present in each process chamber, count first count data of data tables for corresponding process chambers; a memory configured to store the data tables; and a controller configured to assign first transfer flag data to a data table of a process chamber having largest first count data and configured to control the transfer part based on the first transfer flag data so as to transfer the substrates in the predetermined order.Type: ApplicationFiled: July 31, 2019Publication date: March 19, 2020Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Naofumi OHASHI, Toshiyuki KIKUCHI, Shun MATSUI, Tadashi TAKASAKI
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Patent number: 10503152Abstract: Described herein is a technique capable of improving the productivity of a substrate processing system including a plurality of process chambers. According to the technique described herein, there is provided a method of manufacturing a semiconductor device, including: (a) placing a storage container accommodating substrates on a loading port shelf; (b) transferring the substrates in a predetermined order from the storage container to process chambers capable of processing the substrates; (c) perform a substrate processing in the process chambers; (d) generating first count data corresponding to the processing chambers; (e) storing the first count data; (f) assigning transfer flag data to one of the process chambers next to another of the process chambers corresponding to a maximum count number of the first count data; and (g) transferring substrates accommodated in a next storage container of the storage container in the predetermined order based on the transfer flag data.Type: GrantFiled: September 19, 2018Date of Patent: December 10, 2019Assignee: Kokusai Electric CorporationInventors: Naofumi Ohashi, Toshiyuki Kikuchi, Shun Matsui, Tadashi Takasaki
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Publication number: 20190294151Abstract: Described herein is a technique capable of improving the productivity of a substrate processing system including a plurality of process chambers. According to the technique described herein, there is provided a method of manufacturing a semiconductor device, including: (a) placing a storage container accommodating substrates on a loading port shelf; (b) transferring the substrates in a predetermined order from the storage container to process chambers capable of processing the substrates; (c) perform a substrate processing in the process chambers; (d) generating first count data corresponding to the processing chambers; (e) storing the first count data; (f) assigning transfer flag data to one of the process chambers next to another of the process chambers corresponding to a maximum count number of the first count data; and (g) transferring substrates accommodated in a next storage container of the storage container in the predetermined order based on the transfer flag data.Type: ApplicationFiled: September 19, 2018Publication date: September 26, 2019Inventors: Naofumi OHASHI, Toshiyuki KIKUCHI, Shun MATSUI, Tadashi TAKASAKI
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Publication number: 20190221460Abstract: A technique is described that provides efficient production management of a substrate processing system that includes a substrate processing apparatus and a mobile terminal. The substrate processing apparatus includes: at least one reactor where a substrate is processed; a transfer chamber adjacent to at least one reactor; a detector that detects a state of at least one reactor, a state of the transfer chamber, and generates monitored apparatus information representing the state of at least one reactor, and the state of the transfer chamber.Type: ApplicationFiled: September 27, 2018Publication date: July 18, 2019Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Yasuhiro MIZUGUCHI, Toshiyuki KIKUCHI, Naofumi OHASHI, Tadashi TAKASAKI, Shun MATSUI
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Patent number: 10340237Abstract: A method of manufacturing a high quality a semiconductor device, includes loading a substrate comprising a conductive film and an insulating film into a process chamber. The insulating film is formed around the conductive film to expose the conductive film. A process gas, which comprises a component that reacts with a desorbed gas generated from the insulating film is supplied into the process chamber which causes a protective film to be selectively formed on the insulating film.Type: GrantFiled: January 26, 2018Date of Patent: July 2, 2019Assignee: KOKUSAI ELECTRIC CORPORATIONInventors: Hideharu Itatani, Naofumi Ohashi, Toshiyuki Kikuchi
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Publication number: 20190081014Abstract: A method of manufacturing a high quality a semiconductor device, includes loading a substrate comprising a conductive film and an insulating film into a process chamber. The insulating film is formed around the conductive film to expose the conductive film. A process gas, which comprises a component that reacts with a desorbed gas generated from the insulating film is supplied into the process chamber which causes a protective film to be selectively formed on the insulating film.Type: ApplicationFiled: January 26, 2018Publication date: March 14, 2019Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Hideharu ITATANI, Naofumi OHASHI, Toshiyuki KIKUCHI
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Patent number: 10128128Abstract: A method of manufacturing a semiconductor device includes: (a) loading into a process chamber a substrate including: a wiring layer including a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film; and (b) supplying a silicon-containing gas into the process chamber to form a silicon-containing film on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed.Type: GrantFiled: March 16, 2017Date of Patent: November 13, 2018Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Tsuyoshi Takeda, Hiroshi Ashihara, Naofumi Ohashi, Toshiyuki Kikuchi
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Publication number: 20180315651Abstract: Described herein is a technique capable of providing a semiconductor device having good characteristics. According to the technique described herein, there is provided a method of manufacturing a semiconductor device, including: (a) loading a substrate into a process chamber; and (b) forming a stacked etch stopper film by performing: (b-1) forming a first etch stopper film containing a first element and a second element by supplying a first element-containing gas and a second element-containing gas onto the substrate; and (b-2) forming a second etch stopper film containing the first element, the second element and a third element by supplying the first element-containing gas, the second element-containing gas and a third element-containing gas onto the first etch stopper film.Type: ApplicationFiled: April 27, 2018Publication date: November 1, 2018Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Tsuyoshi TAKEDA, Naofumi OHASHI, Toshiyuki KIKUCHI
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Publication number: 20180298488Abstract: A film formation apparatus is configured so as to be equipped with: a film-forming chamber for forming a thin film using plasma on a substrate at a film formation position; an abnormal discharge-detecting section for detecting an abnormal discharge of the plasma; an imaging device for imaging abnormal plasma, which is the plasma when an abnormal discharge is detected, or an abnormal substrate surface, which is the substrate surface on which a thin film is formed when an abnormal discharge is detected; and a storage unit for storing the images taken by the imaging device.Type: ApplicationFiled: September 22, 2014Publication date: October 18, 2018Inventors: Eiji SAKATA, Toshiyuki KIKUCHI, Satoru KASHIWAGI, Yasuo SERA
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Patent number: 10090322Abstract: A method of manufacturing a semiconductor device, includes: loading a substrate including a laminated film including an insulating film and a sacrificial film, a channel hole formed in the laminated film, a charge trapping film formed on a surface in the channel hole, a first channel film formed on a surface of the charge trapping film, and a common source line exposed on the bottom of the channel hole; receiving information on a distribution of hole diameter of the channel hole; and forming a second channel film on a surface of the first channel film by supplying a first processing gas and a second processing gas to a center side and an outer peripheral side of the substrate, respectively, so as to correct the distribution of the hole diameter based on the information.Type: GrantFiled: March 17, 2017Date of Patent: October 2, 2018Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Satoshi Shimamoto, Toshiyuki Kikuchi, Atsushi Moriya, Masanori Nakayama, Takashi Nakagawa
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Publication number: 20180197877Abstract: A method of manufacturing a semiconductor device, includes: loading a substrate including a laminated film including an insulating film and a sacrificial film, a channel hole formed in the laminated film, a charge trapping film formed on a surface in the channel hole, a first channel film formed on a surface of the charge trapping film, and a common source line exposed on the bottom of the channel hole; receiving information on a distribution of hole diameter of the channel hole; and forming a second channel film on a surface of the first channel film by supplying a first processing gas and a second processing gas to a center side and an outer peripheral side of the substrate, respectively, so as to correct the distribution of the hole diameter based on the information.Type: ApplicationFiled: March 17, 2017Publication date: July 12, 2018Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Satoshi SHIMAMOTO, Toshiyuki KIKUCHI, Atsushi MORIYA, Masanori NAKAYAMA, Takashi NAKAGAWA
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Patent number: 9991179Abstract: Provided is a technique capable of obtaining a satisfactory yield for a semiconductor device with an air gap. The technique includes a method of manufacturing a semiconductor device, including: (a) receiving a thickness information of a wiring layer formed on a substrate including: a first interlayer insulation film; and the wiring layer disposed on the first interlayer insulation film, the wiring layer including: copper-containing films used as wiring; and an inter-wiring insulation film having trenches filled with the copper-containing films and insulating the copper-containing films; (b) placing the substrate on a substrate support installed in a process chamber; and (c) etching the wiring layer using an etching gas based on an etching control value corresponding to the thickness information of the wiring layer.Type: GrantFiled: September 14, 2016Date of Patent: June 5, 2018Assignee: Hitachi Kokusai Electric, Inc.Inventors: Naofumi Ohashi, Kazuyuki Toyoda, Satoshi Shimamoto, Toshiyuki Kikuchi
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Publication number: 20170358506Abstract: Provided is a technique capable of obtaining a satisfactory yield for a semiconductor device with an air gap. The technique includes a method of manufacturing a semiconductor device, including: (a) receiving a thickness information of a wiring layer formed on a substrate including: a first interlayer insulation film; and the wiring layer disposed on the first interlayer insulation film, the wiring layer including: copper-containing films used as wiring; and an inter-wiring insulation film having trenches filled with the copper-containing films and insulating the copper-containing films; (b) placing the substrate on a substrate support installed in a process chamber; and (c) etching the wiring layer using an etching gas based on an etching control value corresponding to the thickness information of the wiring layer.Type: ApplicationFiled: September 14, 2016Publication date: December 14, 2017Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Naofumi OHASHI, Kazuyuki TOYODA, Satoshi SHIMAMOTO, Toshiyuki KIKUCHI