Abstract: An inverter control device 200 includes a current control unit 210 that outputs a voltage commands (Vd*, Vq*), a modulation wave control unit 220 that generates a modulation wave based on the voltage commands (Vd*, Vq*), a pulse generation unit 230 that generates a PWM pulse for controlling an inverter 100 using a modulation wave and a carrier wave of a predetermined frequency, and a pulse shift unit 250 that corrects the phase of the PWM pulse such that the PWM pulse is output in a phase corresponding to a harmonic of a predetermined order of the modulation wave in the near-zero-cross region including the zero-cross point at which the modulation wave changes across 0.

Abstract: There is provided a semiconductor device that includes a diode portion, the semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; an anode region of a second conductivity type provided to be closer to a front surface side of the semiconductor substrate than the drift region; and a trench contact portion provided at a front surface of the semiconductor substrate in the diode portion, in which in a depth direction of the semiconductor substrate, a doping concentration of the anode region at a same depth as that of a bottom portion of the trench contact portion is 1E16 cm?3 or more and 1E17 cm?3 or less.

Abstract: Provided is a semiconductor device including a semiconductor substrate having a transistor portion and a diode portion; and an emitter electrode and a gate electrode provided above a front surface of the semiconductor substrate, wherein the transistor portion has a plurality of trench portions electrically connected to the gate electrode, a drift region of a first conductivity type provided in the semiconductor substrate, a base region of a second conductivity type provided above the drift region, and a trench bottom barrier region of a second conductivity type provided between the drift region and the base region and having a higher doping concentration than that of the base region, and the trench bottom barrier region is electrically connected to the emitter electrode.

Abstract: A semiconductor device, including a semiconductor substrate having a diode portion, wherein the diode portion includes: an anode region which is provided on a front surface of the semiconductor substrate and is of a second conductivity type; a trench portion provided so as to extend in a predetermined extending direction on the front surface of the semiconductor substrate; a trench contact portion provided on the front surface of the semiconductor substrate; and a plug region which is provided at a lower end of the trench contact portion and is of a second conductivity type, and which has a doping concentration higher than that of the anode region, wherein a plurality of plug regions, each of which being the plug region, is provided separately from each other along the extending direction, is provided.

Abstract: Provided is a semiconductor device, including: a semiconductor substrate including a bulk donor; an active portion provided on the semiconductor substrate; and an edge termination structure portion provided between the active portion and an end side of the semiconductor substrate on a upper surface of the semiconductor substrate; wherein the active portion includes hydrogen, and has a first high concentration region with a higher donor concentration than a bulk donor concentration; and the edge termination structure portion, which is provided in a range that is wider than the first high concentration region in a depth direction of the semiconductor substrate, includes hydrogen, and has a second high concentration region with a higher donor concentration than the bulk donor concentration.

Abstract: A semiconductor device including: a semiconductor substrate; a temperature sensing unit provided on a front surface of the semiconductor substrate; an anode pad and a cathode pad electrically connected with the temperature sensing unit; a front surface electrode being set to a predetermined reference potential; and a bidirectional diode unit electrically connected in a serial bidirectional way between the cathode pad and the front surface electrode is provided. The output comparison diode unit may be arranged between the anode pad and the cathode pad. The temperature sensing unit may include a temperature sensing diode, and the output comparison diode unit may include a diode connected in inverse parallel to the temperature sensing diode.

Abstract: There is provided a semiconductor device including a transistor portion and a diode portion. The transistor portion has a first-conductivity-type drift region formed inside a semiconductor substrate, a second-conductivity-type base region provided above the drift region inside the semiconductor substrate, and a second-conductivity-type collector region provided below the drift region inside the semiconductor substrate. The transistor portion has a second-conductivity-type well region provided inside the semiconductor substrate and extending downward beyond the base region and an injection amount restricting portion occupying at least a part of a region that is positioned below the well region and having a smaller second-conductivity-type carrier injection amount per unit area than the collector region.

Abstract: Provided is an electrical junction box including a lower case and an upper case joined to the lower case, wherein the upper case includes an inner wall that opposes an inner surface of the lower case and an outer wall that opposes an outer surface of the lower case, the outer wall has a first wall portion that is in intimate contact with the outer surface of the lower case and a second wall portion that extends upward continuously from the first wall portion, and an upper end of the lower case is inserted between the inner wall and the second wall portion with clearances CL1 and CL2.

Abstract: There is provided a semiconductor device including a transistor portion and a diode portion. The transistor portion has a first-conductivity-type drift region formed inside a semiconductor substrate, a second-conductivity-type base region provided above the drift region inside the semiconductor substrate, and a second-conductivity-type collector region provided below the drift region inside the semiconductor substrate. The transistor portion has a second-conductivity-type well region provided inside the semiconductor substrate and extending downward beyond the base region and an injection amount restricting portion occupying at least a part of a region that is positioned below the well region and having a smaller second-conductivity-type carrier injection amount per unit area than the collector region.

Abstract: Provided is an electrical junction box including a lower case and an upper case joined to the lower case, wherein the upper case includes an inner wall that opposes an inner surface of the lower case and an outer wall that opposes an outer surface of the lower case, the outer wall has a first wall portion that is in intimate contact with the outer surface of the lower case and a second wall portion that extends upward continuously from the first wall portion, and an upper end of the lower case is inserted between the inner wall and the second wall portion with clearances CL1 and CL2.

Abstract: An electrical connection box includes: a casing that has an opening portion open upwardly, a recessed portion recessed downwardly from an upper edge portion of a side wall; and a slidable cover configured to close the recessed portion. A first thin portion is formed at a side edge portion of the recessed portion of the casing. A second thin portion is formed on the slidable cover. The first thin portion and the second thin portion overlap each other when the slidable cover is fitted into the recessed portion. The first thin portion is includes a chamfered portion where a boundary between an opening edge portion of the first thin portion and the side edge portion is chamfered. A contact portion is configured to be brought into contact with the chamfered portion.

Abstract: A semiconductor device drive method achieves a balance between a lifetime and a detection sensitivity which are required for a temperature detection diode formed via an insulating film on a substrate on which an active element is formed. The semiconductor device drive method includes energizing the temperature detection diode with a constant current, the constant current having a current density value between an upper limit defined based on the lifetime of the temperature detection diode, and a lower defined based on a variation allowable voltage of an output voltage of the temperature detection diode with respect to a standard deviation.

Abstract: A semiconductor device that includes a p-type region formed selectively along one principle surfaces of an n-type drift layer and having a resistance that is lower than that of the drift layer, and in which, when a depth R at which a vacancy-oxygen complex defect region is provided in the drift layer with a thickness t from a surface of a pn junction being a boundary of the p-type region in a thickness direction of the drift layer from a back surface of a semiconductor substrate, resistivity of the drift layer is ?, and width W of a depletion layer extending in the drift layer from the pn junction with a reverse bias voltage V to the pn junction is represented as W=0.54×?/(?×V), the vacancy-oxygen complex defect region is provided at the depth R represented by 0<R?t?W.

Abstract: An electrical connection box includes: a casing that has an opening portion open upwardly, a recessed portion recessed downwardly from an upper edge portion of a side wall; and a slidable cover configured to close the recessed portion. A first thin portion is formed at a side edge portion of the recessed portion of the casing. A second thin portion is formed on the slidable cover. The first thin portion and the second thin portion overlap each other when the slidable cover is fitted into the recessed portion. The first thin portion is includes a chamfered portion where a boundary between an opening edge portion of the first thin portion and the side edge portion is chamfered. A contact portion is configured to be brought into contact with the chamfered portion.

Abstract: The present invention suppresses an increase in the number of components and simplifies an attachment task. An electrical connection box is configured such that multiple wire harnesses are connected thereto side-by-side vertically. The electrical connection box includes: a lower case having a lower placement portion on which a lower wire harness is to be placed; a harness support member having a lower holding portion that is latched to the lower placement portion and holds the lower wire harness, and having an upper placement portion on which an upper wire harness is to be placed; and an upper case that is mated to the lower case and has an upper holding portion that is latched to the upper placement portion and holds the upper wire harness.

Abstract: A semiconductor device that includes a p-type region formed selectively along one principle surfaces of an n-type drift layer and having a resistance that is lower than that of the drift layer, and in which, when a depth R at which a vacancy-oxygen complex defect region is provided in the drift layer with a thickness t from a surface of a pn junction being a boundary of the p-type region in a thickness direction of the drift layer from a back surface of a semiconductor substrate, resistivity of the drift layer is ?, and width W of a depletion layer extending in the drift layer from the pn junction with a reverse bias voltage V to the pn junction is represented as W=0.54×?/(?×V), the vacancy-oxygen complex defect region is provided at the depth R represented by 0<R?t?W.

Abstract: The present invention suppresses an increase in the number of components and simplifies an attachment task. An electrical connection box is configured such that multiple wire harnesses are connected thereto side-by-side vertically. The electrical connection box includes: a lower case having a lower placement portion on which a lower wire harness is to be placed; a harness support member having a lower holding portion that is latched to the lower placement portion and holds the lower wire harness, and having an upper placement portion on which an upper wire harness is to be placed; and an upper case that is mated to the lower case and has an upper holding portion that is latched to the upper placement portion and holds the upper wire harness.

Abstract: A semiconductor device is disclosed. The semiconductor device is capable of obtaining a high reverse recovery resistant amount by allowing sheet resistance of a peripheral portion in a p type diffusion region that is in contact with a metal electrode through an insulating film on a surface to be as high as possible and reducing an increase in cost if possible. The semiconductor device includes: a p type diffusion region that is disposed in a surface layer of the one main surface of an n type semiconductor substrate; and a voltage-resistant region that surrounds the p type diffusion region.

Abstract: A semiconductor device drive method achieves a balance between a lifetime and a detection sensitivity which are required for a temperature detection diode formed via an insulating film on a substrate on which an active element is formed. The semiconductor device drive method includes energizing the temperature detection diode with a constant current, the constant current having a current density value between an upper limit defined based on the lifetime of the temperature detection diode, and a lower defined based on a variation allowable voltage of an output voltage of the temperature detection diode with respect to a standard deviation.

Abstract: A manufacturing method for a printed wiring board includes forming an electroless plated film on an interlayer resin insulation layer, forming on the electroless plated film a plating resist with an opening to expose a portion of the electroless plated film, forming an electrolytic plated film on the portion of the electroless plated film exposed through the opening, removing the plating resist using a resist-removing solution containing an amine, reducing a thickness of a portion of the electroless plated film existing between adjacent portions of the electrolytic plated film by using the resist-removing solution, and forming a conductive pattern by removing the portion of the electroless plated film existing between the adjacent portions of the electrolytic plated film by using an etchant.