Patents by Inventor Toshiyuki Nanto
Toshiyuki Nanto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120062238Abstract: A battery controller for controlling an assembled battery configured by connecting battery groups each including battery cells, includes: voltage measuring units that are provided respectively for the battery groups each to measure a voltage of each of the battery cells included in a corresponding battery group; a minimum value detecting unit that detects a minimum value of the battery cells for each of the battery groups based upon the measured voltage of each of the battery cells; a reference value setting unit that sets a reference value used to determine an abnormal voltage drop for each of the battery groups based upon the measured voltage of each of the battery cells; and an abnormality determining unit that makes a determination that an abnormal voltage drop is present, if a difference between the reference value and the minimum value exceeds a predetermined value, for each of the battery groups.Type: ApplicationFiled: August 19, 2011Publication date: March 15, 2012Applicant: Hitachi Vehicle Energy, Ltd.Inventors: Tatsuhiko Kawasaki, Kenji Hara, Toshiyuki Nanto, Hirofumi Takahashi
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Patent number: 7825596Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: GrantFiled: April 14, 2006Date of Patent: November 2, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Publication number: 20090146563Abstract: A plasma display panel has a screen (50) composed of a plurality of cells and a dielectric layer (17) across the entirety of the screen, and each cell includes a discharge space (31) filled with a discharge gas, a pair of electrodes (X, Y) for causing discharge in the discharge space (31), and a dielectric that is part of the dielectric layer (17) and that is interposed between the discharge space (31) and the electrodes (X, Y). The dielectric layer (17) has such a distribution of thickness that the dielectric layer is thinnest at the central portion of the screen and is gradually growing from the central portion of the screen toward the peripheral portions of the screen. The distribution of thickness in the dielectric layer makes the variation in the discharge delay between cells prominent, thereby relaxing the concentration of the discharge current.Type: ApplicationFiled: April 28, 2006Publication date: June 11, 2009Inventor: Toshiyuki Nanto
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Publication number: 20090026950Abstract: By making the thickness of a dielectric layer thinner than the thickness of each of electrodes, an opposed discharging phenomenon is exerted between the electrodes so that it becomes possible to reduce the discharging voltage between the electrodes. A plasma display panel is provided with a pair of substrates which are aligned face to face with each other with a discharge space placed inside thereof, a plurality of electrodes which are formed on the inner face of one of the substrates in a manner so as to be extended in a fixed direction, with a predetermined thickness, so that by generating a surface discharge, a screen display is carried out, and a dielectric layer which covers the electrodes, and in this structure, the dielectric layer is formed with a thickness which is thinner than the thickness of the electrodes.Type: ApplicationFiled: September 2, 2005Publication date: January 29, 2009Applicant: FUJITSU HITACHI PLASAMA DISPLAY LIMITEDInventors: Hideki Harada, Toshiyuki Nanto
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Patent number: 7208877Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: GrantFiled: August 2, 2004Date of Patent: April 24, 2007Assignee: Hitachi, Ltd.Inventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Takeo Miyahara, legal representative, Shizuko Miyahara, legal representative, Mamaru Miyahara, deceased
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Patent number: 7133007Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: GrantFiled: March 24, 2004Date of Patent: November 7, 2006Assignee: Hitachi, Ltd.Inventors: Tsutae Shinoda, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto
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Publication number: 20060202620Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: ApplicationFiled: May 8, 2006Publication date: September 14, 2006Applicant: HITACHI, LTD.Inventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Publication number: 20060182876Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: ApplicationFiled: April 14, 2006Publication date: August 17, 2006Applicant: HITACHI, LTD.Inventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Publication number: 20060154394Abstract: The manufacturing method includes the step of forming a dielectric layer on a substrate where electrodes are formed so as to coat the electrodes in accordance with a vapor phase growth method, the step of carrying out a process for planarization on the dielectric layer, and the step of forming a protective film on the dielectric layer.Type: ApplicationFiled: January 9, 2006Publication date: July 13, 2006Applicant: Fujitsu Hitachi Plasma Display LimitedInventors: Toshiyuki Nanto, Hideki Harada
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Publication number: 20060145610Abstract: A panel structure is provided in which a dielectric layer having no voids thereinside can be formed by a vapor deposition method. A layered film of plural metal layers that constitute an electrode covered with a dielectric layer is formed to have a stepped shape in which a width is smaller from a bottom layer to an uppermost layer for each layer in order. The stepped shape is formed by projecting an edge portion of a lower layer by design compared to an upper layer.Type: ApplicationFiled: November 1, 2005Publication date: July 6, 2006Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Syuma Eifuku, Toshiyuki Nanto, Nobuhiro Iwase, Tetsurou Kawakita
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Patent number: 7030563Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: GrantFiled: March 29, 2004Date of Patent: April 18, 2006Assignee: Hitachi, Ltd.Inventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Patent number: 6861803Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting, these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: GrantFiled: September 5, 2000Date of Patent: March 1, 2005Assignee: Fujitsu LimitedInventors: Tsutae Shinoda, Shinji Kanagu, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Patent number: 6855026Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.Type: GrantFiled: October 8, 2003Date of Patent: February 15, 2005Assignees: Fujitsu Limited, Fujitsu Hitachi Plasma Display LimitedInventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa
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Publication number: 20050001550Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: ApplicationFiled: August 2, 2004Publication date: January 6, 2005Applicant: FUJITSU LIMITEDInventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Patent number: 6838824Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: GrantFiled: November 27, 2001Date of Patent: January 4, 2005Assignee: Fujitsu LimitedInventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Mamaru Miyahara
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Publication number: 20040222948Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.Type: ApplicationFiled: March 24, 2004Publication date: November 11, 2004Applicant: FUJITSU LIMITEDInventors: Tsutae Shinoda, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto
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Patent number: RE40502Abstract: A plasma display panel has a good productivity of partition formation and air exhaustion process and realizes a bright and stable display. A discharge gas is filled in a gap between two substrates. A mesh-patterned partition is arranged on the inner surface of one of the substrates for dividing the gap into plural squares corresponding to a cell arrangement. The partition has low portions forming a mesh-like air path that travels through all of the gas-filled space enclosed by the partition, in a plan view. A plasma display panel includes two spaced substrates defining a gap therebetween. The gap is divided by intersecting walls into columns and rows of discharge cells. Portions of a wall that are lower in height than remaining portions of the wall define a flow path. The plasma display panel realizes a bright and stable display.Type: GrantFiled: April 25, 2005Date of Patent: September 16, 2008Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Yasuhiko Kunii, Masayuki Shibata, Yoshimi Kawanami, Kenichi Yamamoto, Atsushi Yokoyama, Yusuke Yajima, Shinji Kanagu, Yasuhiro Wakabayashi, Akihiro Fujimoto, Toshiyuki Nanto
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Patent number: RE41312Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.Type: GrantFiled: February 14, 2007Date of Patent: May 4, 2010Assignees: Fujitsu Hitachi Plasma Display Limited, Hitachi, Ltd.Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa
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Patent number: RE42405Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.Type: GrantFiled: December 4, 2008Date of Patent: May 31, 2011Assignees: Fujitsu Hitachi Plasma Display Limited, Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa
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Patent number: RE44445Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.Type: GrantFiled: May 27, 2011Date of Patent: August 20, 2013Assignees: Hitachi Consumer Electronics Co., Ltd., Hitachi, Ltd.Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa