Patents by Inventor Toshiyuki Nitta
Toshiyuki Nitta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230275400Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.Type: ApplicationFiled: May 4, 2023Publication date: August 31, 2023Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Naoki FUJIWARA, Hideki YAGI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
-
Patent number: 11735888Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.Type: GrantFiled: January 21, 2021Date of Patent: August 22, 2023Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Naoki Fujiwara, Hideki Yagi, Takuo Hiratani, Takehiko Kikuchi, Toshiyuki Nitta
-
Patent number: 11527866Abstract: A semiconductor optical device includes an SOI substrate having a waveguide of silicon, and at least one gain region of a group III-V compound semiconductor having an optical gain bonded to the SOI substrate. The waveguide has a bent portion and multiple linear portions extending linearly and connected to each other through the bent portion. The gain region is disposed on each of the multiple linear portions.Type: GrantFiled: October 23, 2020Date of Patent: December 13, 2022Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Naoki Fujiwara, Hideki Yagi, Hajime Shoji, Takuo Hiratani, Takehiko Kikuchi, Toshiyuki Nitta
-
Patent number: 11211523Abstract: A method for manufacturing an optical semiconductor device includes the steps of bonding a chip including a first substrate and a compound semiconductor layer disposed on the first substrate to a second substrate including silicon such that the compound semiconductor layer faces the second substrate; after the step of bonding the chip, etching the first substrate; after the etching step, forming a resist having a residue of the first substrate exposed therefrom and covering the compound semiconductor layer and the second substrate; and after the step of forming the resist, etching the residue.Type: GrantFiled: July 24, 2020Date of Patent: December 28, 2021Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Toshiyuki Nitta
-
Publication number: 20210249840Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.Type: ApplicationFiled: January 21, 2021Publication date: August 12, 2021Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Naoki FUJIWARA, Hideki YAGI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
-
Publication number: 20210126428Abstract: A semiconductor optical device includes an SOI substrate having a waveguide of silicon, and at least one gain region of a group III-V compound semiconductor having an optical gain bonded to the SOI substrate. The waveguide has a bent portion and multiple linear portions extending linearly and connected to each other through the bent portion. The gain region is disposed on each of the multiple linear portions.Type: ApplicationFiled: October 23, 2020Publication date: April 29, 2021Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Naoki FUJIWARA, Hideki YAGI, Hajime SHOJI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
-
Publication number: 20210036181Abstract: A method for manufacturing an optical semiconductor device includes the steps of bonding a chip including a first substrate and a compound semiconductor layer disposed on the first substrate to a second substrate including silicon such that the compound semiconductor layer faces the second substrate; after the step of bonding the chip, etching the first substrate; after the etching step, forming a resist having a residue of the first substrate exposed therefrom and covering the compound semiconductor layer and the second substrate; and after the step of forming the resist, etching the residue.Type: ApplicationFiled: July 24, 2020Publication date: February 4, 2021Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Toshiyuki NITTA
-
Patent number: 5445692Abstract: A process is used for reinforcing a semiconductor wafer, where remaining bubbles in a hot-melt adhesive can be reduced in number and in size. A reinforced wafer adhering to a reinforcing plate with a heated and softened adhesive is kept in a lower ambient pressure than a standard atmosphere for a predetermined period for deaeration, and is cooled under a higher pressure than the deaeration pressure. A reinforcing plate has a groove on its adhering face.Type: GrantFiled: November 24, 1993Date of Patent: August 29, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventor: Toshiyuki Nitta
-
Patent number: 5403773Abstract: A surface emitting type of light emitting devices has a narrow emanating region near the front surface. A spherical lens is fixed on the front surface or rear surface for converging light beams to a core of an optical fiber. Prior devices determined the position of the spherical lens by forming a concavity or a set of protrusions on the rear surface. Two wafer processes were required to form the concavity or protrusions. Two wafer processes on both surfaces induced not a little positioning error.This invention does not form concavities nor protrusions on the rear surface. The rear surface is ground and left flat. Second electrode is formed on the rear surface, not hindering light to emit through. The center of the emanating region is determined by supplying current to the device and illuminating the emanating region. The emanating pattern is observed by a TV camera connected to a computer. The center of the emanating region is detected by image processing of the illuminated pattern.Type: GrantFiled: July 9, 1993Date of Patent: April 4, 1995Assignee: Sumimoto Electric Industries, Ltd.Inventors: Toshiyuki Nitta, Takashi Iwasaki
-
Patent number: 4999135Abstract: A rust-proof sealing composition contains 30 to 90 parts by weight of an epoxy resin, 8 to 30 parts by weight of a curing agent containing a carboxylic acid derivative selected from the group consisting of aminocarboxylic acid, polycarboxylic acid hydrazide having not less than 8 carbon atoms and mixtures thereof, 1 to 20 parts by weight of an electrically conductive carbon and a balance of a filler such that the total amounts make up 100 parts by weight. The epoxy resin contains 100 to 30 wt. % of a modified epoxy resin selected from the group consisting of a butadiene/acrylonitrile-modified epoxy resin, an urethane-modified epoxy resin and mixtures thereof, and 0 to 70 wt. % of an epoxy other than the modified epoxy resin.Type: GrantFiled: April 17, 1989Date of Patent: March 12, 1991Inventors: Hiroshi Matsuda, Toshiyuki Nitta, Toshiyuki Aoki