Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.

Abstract: A compiling unit (110) generates indefinite branch information showing that an instruction set to be selected is indefinite, instead of generating a branch instruction. A linking unit (130) generates an appropriate direct addressing branch instruction by judging whether an instruction set used at a branch source and an instruction set used at a branch destination are the same. Also, one reference instruction set is determined. The compiling unit (110) adds a mode adjusting instruction that belongs to the reference instruction set and that is for causing a branch to an instruction placed at a branch destination and for selecting the instruction set that is originally to be selected. The mode adjusting instruction provides an alternative branch destination corresponding to an original branch destination, and the compiling unit (110) generates an indirect addressing branch instruction for causing a branch to the alternative branch destination and for selecting the reference instruction set.

Abstract: A compiler apparatus that improves the performance of loop processing. The compiler apparatus translates a C program that includes a loop into a machine language program, and includes: a movement judgment unit that judges whether or not an instruction which is positioned outside of the loop of the C program can be moved into the loop, based on a state of live ranges of variables used in the instruction; a movement execution unit that moves the instruction into the loop in the case where the movement judgment unit judges that the instruction can be moved into the loop, thereby generating an intermediate program; and a translation unit that translates the intermediate program into the machine language program.

Abstract: Disclosed is a compiler apparatus for generating an instruction code composed of instruction sets each including an instruction that designates an m-bit immediate value indicating a location of a data item in a memory area. The compiler apparatus sequentially selects, based on one data attribute, a data item from a group X composed of a plurality of data items; and judges, each time a data item is selected, whether the selected data item is allocatable to an n-byte memory area (n?2m). When the judgment is negative, the compiler apparatus specifies, based on a different data attribute, a data item out of all the selected data items and excludes the specified data item from the group X, and repeats the selection until all the data items remaining in the group X after excluding specified data items are judged to be allocatable to the memory area.

Abstract: A program processing apparatus, which can check hint information as represented by a pragma so that a compiler may not create a wrong machine-language program, includes: a syntax analysis unit which analyzes a syntax of a program that includes hint information given by a user to the compiler, for generating analysis information; and an error check unit that checks whether or not the hint information in the program is logically contradictory.

Abstract: A program processing apparatus, which can correct a source program by automatically inserting hint information so that a satisfactory optimization can be performed even in the case where the user has not given hint information to a compiler, automatically inserts, into the source program, hint information given to the compiler, and includes: a syntax analysis unit which analyzes a syntax of the source program and generates analysis information; and a hint information insertion unit which creates a program by inserting hint information that is logically consistent and that is given to the compiler into the source program based on the analysis information, and outputs the created program.

Abstract: Disclosed is a compiler apparatus for generating an instruction code composed of instruction sets each including an instruction that designates an m-bit immediate value indicating a location of a data item in a memory area. The compiler apparatus sequentially selects, based on one data attribute, a data item from a group X composed of a plurality of data items; and judges, each time a data item is selected, whether the selected data item is allocatable to an n-byte memory area (n≦2m). When the judgment is negative, the compiler apparatus specifies, based on a different data attribute, a data item out of all the selected data items and exclude the specified data item from the group X, and repeats the selection until all the data items remaining in the group X after excluding all the specified data items are judged to be allocatable to the memory area.

Abstract: The present invention provides a highly-flexible compiler that a user can control optimization by the compiler precisely.

Abstract: A dependency analysis unit creates a dependency graph showing dependencies between instructions acquired from an assembler code generation unit. A precedence constraint rank calculation unit assigns predetermined weights to arcs in the graph, and adds up weights to calculate a precedence constraint rank of each instruction. When a predecessor and a successor having a dependency and an equal precedence constraint rank cannot be processed in parallel due to a resource constraint, a resource constraint evaluation unit raises the precedence constraint rank of the predecessor. A priority calculation unit sets the raised precedence constraint rank as a priority of the predecessor. An instruction selection unit selects an instruction having a highest priority. An execution timing decision unit places the selected instruction in a clock cycle. The selection by the instruction selection unit and the placement by the execution timing decision unit are repeated until all instructions are placed in clock cycles.

Abstract: The first, second, and third operating units 441 to 443 each perform a predetermined operation according to an instruction before a point of time partway through a clock cycle. When having performed a comparison operation, each operating unit outputs a result value to the condition flag operating unit 51. The condition flag operating unit 51 calculates a new condition flag value by performing a logical operation on either (a) a value that has been read from the condition flag register 46 and the result value or (b) the result values themselves. The condition flag operating unit 51 outputs, before the clock cycle ends, the new condition flag value to one of the first, second, and third gates 451 to 453 that is related to a conditional instruction so as to control nullification of the conditional instruction. The condition flag register 46 stores therein the new condition flag value.

Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.

Abstract: A compiling unit (110) generates indefinite branch information showing that an instruction set to be selected is indefinite, instead of generating a branch instruction. A linking unit (130) generates an appropriate direct addressing branch instruction by judging whether an instruction set used at a branch source and an instruction set used at a branch destination are the same. Also, one reference instruction set is determined. The compiling unit (110) adds a mode adjusting instruction that belongs to the reference instruction set and that is for causing a branch to an instruction placed at a branch destination and for selecting the instruction set that is originally to be selected. The mode adjusting instruction provides an alternative branch destination corresponding to an original branch destination, and the compiling unit (110) generates an indirect addressing branch instruction for causing a branch to the alternative branch destination and for selecting the reference instruction set.

Abstract: A program conversion device includes a formal initialization expression generating unit, an actual initialization expression generating unit, and an object generation statement translating unit. The formal initialization expression generating unit focuses on a definition of an object generation function written in a source program and generates, if the object generation function does not perform any processing other than setting values in member variables of an object, a formal initialization expression which is the member variables represented by formal parameters. The actual initialization expression generating unit focuses on an object generation statement and generates, if a formal initialization expression that corresponds to an object generation function to be invoked by the object generation statement has been generated, an actual initialization expression.

Abstract: A process for producing an aromatic dicarboxylic acid by simple operations using a simple apparatus is disclosed, which enables to effect separation and washing of the product crystals efficiently without suffering from clogging of the apparatus, while permitting recovery of the reaction solvent and catalyst with permission of an efficient replacement of the solvent.

Abstract: A process and an apparatus for producing an aromatic carboxylic acid by a liquid phase oxidation of an alkyl aromatic compound with a molecular oxygen-containing gas in the presence of an oxidation catalyst in a reaction solvent in an oxidation reactor, which process can afford to suppress the amount of non-condensing gas lost in accompaniment with the withdrawn slurry of the formed aromatic carboxylic acid crystals from the oxidation reactor to thereby increase the utilization efficiency of the molecular oxygen-containing gas, wherein a deflector 10 is arranged on the inner surface of the reactor wall at a portion downstream from the opening 9 for the slurry withdrawal line 8 in the flow path of the stirring stream 11 of the reaction liquor and the oxidation is conducted while stirring the reaction liquor by a stirrer 3 and while withdrawing the resulting slurry containing the formed aromatic carboxylic acid crystals from the reactor, by feeding the alkyl aromatic compound together with the reaction solvent

Abstract: A packaging machine has belts for clamping both side edges of a film pulled out selectably from either of two film rolls and transporting it accordingly in either direction to a packaging station. Its film supplying apparatus includes a plurality of sensors capable of detecting both presence and absence of a film. They are disposed at both ends of the belts and each sensor is adapted to output a warning signal when either the presence or absence of a film is detected thereby, depending whether it is at the downstream or upstream end of the belt with respect to the direction of film being transported thereby.

Abstract: A method for recovering crystals from a crystal-containing slurry, which comprises supplying the slurry to a rotary filter having a rotating cylindrical filter medium, filtering the supplied slurry in a filtering region to retain the crystals on the filter medium and washing the filter cake formed on the rotating filter medium repeatedly in a plurality of washing regions by spraying a washing liquid onto the cake in each region by supplying any one of washing regions on the aft side in the rotating direction of the filter medium with the spent washing liquid of the washing region adjacent to said one washing region on the fore side in the rotating direction.

Abstract: An image sensor includes a light receiving insulating substrate which has a plurality of light receiving elements with one row disposed on one major surface and has a first wiring portion on one side of the major surface for connecting the light receiving elements to a plurality of external driving elements; a driving insulating substrate which has the driving elements mounted on one major surface and has a second wiring portion on one side of the major surface for connecting the driving elements to the light receiving elements; a press-contact connector for electrically connecting the wiring portions, keeping the light receiving insulating substrate and the driving insulating substrate in contact with each other with their respective wiring portions positioned back to back; and engaging means provided close to at least one of the wiring portions in the light receiving insulating substrate and the driving insulating substrate and also provided in the press-contact connector, for enhancing a mechanical holding