Patents by Inventor Toshiyuki Tateishi

Toshiyuki Tateishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10431496
    Abstract: Disclosed herein is a device chip package manufacturing method including a cutting step of forming cut grooves having a depth reaching a finished thickness of device chips by cutting a device wafer from a top surface of the device wafer along streets by a cutting blade, a cut groove inclination state detecting step of detecting an inclination state of the cut grooves, a sealing resin layer forming step of forming a sealing resin layer coating the top surface and the cut grooves of the device wafer by supplying a sealing resin to the top surface of the device wafer, and a laser processing step of dividing the device wafer into individual chips and forming device chip packages by applying a laser beam having a wavelength absorbable by the sealing resin layer along the cut grooves of the device wafer held by a chuck table.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: October 1, 2019
    Assignee: DISCO CORPORATION
    Inventor: Toshiyuki Tateishi
  • Publication number: 20190134782
    Abstract: A grinding wheel is mounted at a distal end of a spindle and grinds a wafer held on a holding table. The grinding wheel includes: an annular base having a mounting surface to be mounted on the distal end of the spindle; and a plurality of segment grindstones that are fixedly attached annularly to a surface opposite to the mounting surface of the annular base and that are equidistantly spaced apart from each other. The annular base has a plurality of slits formed therein. Each of the slits represents a gap that is formed between two adjacent segment grindstones and that is extended toward a side of the annular base such that the slit has a width of the gap.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 9, 2019
    Inventor: Toshiyuki TATEISHI
  • Publication number: 20180144981
    Abstract: Disclosed herein is a device chip package manufacturing method including a cutting step of forming cut grooves having a depth reaching a finished thickness of device chips by cutting a device wafer from a top surface of the device wafer along streets by a cutting blade, a cut groove inclination state detecting step of detecting an inclination state of the cut grooves, a sealing resin layer forming step of forming a sealing resin layer coating the top surface and the cut grooves of the device wafer by supplying a sealing resin to the top surface of the device wafer, and a laser processing step of dividing the device wafer into individual chips and forming device chip packages by applying a laser beam having a wavelength absorbable by the sealing resin layer along the cut grooves of the device wafer held by a chuck table.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 24, 2018
    Inventor: Toshiyuki Tateishi
  • Patent number: 9935008
    Abstract: Disclosed herein is a semiconductor device chip manufacturing method including a chipping prevention layer forming step of forming a chipping prevention layer at each intersection of a plurality of crossing division lines formed on the front side of a wafer, a modified layer forming step of applying a laser beam having a transmission wavelength to the wafer to the back side thereof along each division line in the condition where the focal point of the laser beam is set inside the wafer, thereby forming a modified layer inside the wafer along each division line, and a dividing step of grinding the back side of the wafer after performing the modified layer forming step, thereby reducing the thickness of the wafer and also dividing the wafer into individual semiconductor device chips along each division line where the modified layer is formed as a break start point.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: April 3, 2018
    Assignee: Disco Corporation
    Inventor: Toshiyuki Tateishi
  • Publication number: 20180012804
    Abstract: Disclosed herein is a semiconductor device chip manufacturing method including a chipping prevention layer forming step of forming a chipping prevention layer at each intersection of a plurality of crossing division lines formed on the front side of a wafer, a modified layer forming step of applying a laser beam having a transmission wavelength to the wafer to the back side thereof along each division line in the condition where the focal point of the laser beam is set inside the wafer, thereby forming a modified layer inside the wafer along each division line, and a dividing step of grinding the back side of the wafer after performing the modified layer forming step, thereby reducing the thickness of the wafer and also dividing the wafer into individual semiconductor device chips along each division line where the modified layer is formed as a break start point.
    Type: Application
    Filed: June 26, 2017
    Publication date: January 11, 2018
    Inventor: Toshiyuki Tateishi
  • Patent number: 8318518
    Abstract: A light emitting device including a sapphire layer and a light emitting layer formed on the sapphire layer. The sapphire layer has a polygonal sectional shape whose internal angle is an obtuse angle, such as a regular hexagonal shape. Light emitted from the light emitting layer is totally reflected on one side surface of the sapphire layer and next transmitted through another side surface of the sapphire layer.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: November 27, 2012
    Assignee: Disco Corporation
    Inventors: Hitoshi Hoshino, Toshiyuki Tateishi
  • Publication number: 20110133235
    Abstract: A light emitting device including a sapphire layer and a light emitting layer formed on the sapphire layer. The sapphire layer has a polygonal sectional shape whose internal angle is an obtuse angle, such as a regular hexagonal shape. Light emitted from the light emitting layer is totally reflected on one side surface of the sapphire layer and next transmitted through another side surface of the sapphire layer.
    Type: Application
    Filed: November 23, 2010
    Publication date: June 9, 2011
    Applicant: DISCO CORPORATION
    Inventors: Hitoshi Hoshino, Toshiyuki Tateishi
  • Publication number: 20100261309
    Abstract: A method of manufacturing a semiconductor device in which a second semiconductor chip is bonded to a surface of a first semiconductor chip. The method includes: a back side grinding step for grinding the back side of a wafer including a device area where a plurality of first semiconductor chips are formed, the grinding applied to an area corresponding to the device area, so as to reduce the thickness of the wafer in the device area to a predetermined finished thickness; a chip bonding step for bonding the second semiconductor chip to a predetermined position of the surface of each of the first semiconductor chips formed on the face-side surface of the wafer; and a wafer dividing step for dividing the wafer along streets to separate the device area of the wafer into individual semiconductor devices in each of which the second semiconductor chip is bonded to the surface of the first semiconductor chip.
    Type: Application
    Filed: March 12, 2010
    Publication date: October 14, 2010
    Applicant: DISCO CORPORATION
    Inventor: Toshiyuki Tateishi
  • Patent number: 7549560
    Abstract: A method of dividing a wafer along a plurality of first dividing lines and a plurality of second dividing lines intersecting with the first dividing lines on the surface of the wafer. The method includes an internal deteriorated layer forming step for forming a deteriorated layer in the inside of the wafer along both the first dividing lines and the second dividing lines by applying a laser beam along the first dividing lines and the second dividing lines. It also includes an intersection deteriorated layer forming step for forming a deteriorated layer thicker than the deteriorated layer formed in the internal deteriorated layer forming step by applying a laser beam to intersection areas between the first and second dividing lines. Thereafter, a dividing step divides the wafer into individual chips along the first and second dividing lines by exertion of external force to the wafer.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: June 23, 2009
    Assignee: Disco Corporation
    Inventors: Yusuke Nagai, Toshiyuki Tateishi, Tadato Nagasawa
  • Publication number: 20050259459
    Abstract: A method of dividing a wafer having a plurality of first dividing lines and a plurality of second dividing lines intersecting with the first dividing lines formed on the surface of the wafer along the first dividing lines and the second dividing lines, which comprises an internal deteriorated layer forming step for forming a deteriorated layer in the inside of the water along the first dividing lines and the second dividing lines by applying a laser beam along the first dividing lines and the second dividing lines; an intersection deteriorated layer forming step for forming a deteriorated layer thicker than the deteriorated layer formed in the internal deteriorated layer forming step by applying a laser beam to intersection areas between the first dividing lines and the second dividing lines; and a dividing step for dividing the wafer into individual chips along the first dividing lines and the second dividing lines by exerting external force to the wafer.
    Type: Application
    Filed: May 13, 2005
    Publication date: November 24, 2005
    Inventors: Yusuke Nagai, Toshiyuki Tateishi, Tadato Nagasawa
  • Patent number: 6498075
    Abstract: The present invention is to provide a dicing method of cutting a workpiece along the first streets and the second streets by using a cutting blade having an annular cutting edge provided on the outer peripheral portion on one side surface of a base plate, the workpiece having plural first streets and second streets intersected each other at a predetermined angle. When the second streets are to be cut after the first streets are cut, the cutting blade is so positioned that the side of the base plate faces the side of the unworked region of the workpiece.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: December 24, 2002
    Assignee: Disco Corporation
    Inventors: Kouji Fujimoto, Toshiyuki Tateishi
  • Patent number: 6448151
    Abstract: A process for producing a large number of semiconductor chips from a semiconductor wafer having a large number of rectangular areas defined by streets arranged on the front surface in a lattice form, semiconductor circuits being formed in the respective rectangular areas. This process comprises the steps of forming a plurality of grooves having a predetermined depth in the back surface of the semiconductor wafer, grinding the back surface of the semiconductor wafer to reduce the thickness of the semiconductor wafer to a predetermined value and thereafter, cutting the semiconductor wafer along the streets to separate the rectangular areas from one another to obtain semiconductor chips.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: September 10, 2002
    Assignee: Disco Corporation
    Inventor: Toshiyuki Tateishi
  • Publication number: 20020016047
    Abstract: A process for producing a large number of semiconductor chips from a semiconductor wafer having a large number of rectangular areas defined by streets arranged on the front surface in a lattice form, semiconductor circuits being formed in the respective rectangular areas. This process comprises the steps of forming a plurality of grooves having a predetermined depth in the back surface of the semiconductor wafer, grinding the back surface of the semiconductor wafer to reduce the thickness of the semiconductor wafer to a predetermined value and thereafter, cutting the semiconductor wafer along the streets to separate the rectangular areas from one another to obtain semiconductor chips.
    Type: Application
    Filed: March 27, 2001
    Publication date: February 7, 2002
    Inventor: Toshiyuki Tateishi