Patents by Inventor Tosiho Miyamoto

Tosiho Miyamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7119446
    Abstract: A semiconductor device is provided which includes a semiconductor element having power pads for supplying a power potential, ground pads for supplying a ground potential, and signal pads for inputting and outputting a signal, all of which are formed on one main surface thereof. Power bumps for outside connection are connected with the power pad by power wiring sections, ground bumps for outside connection are connected with the ground pad by ground wiring sections, and signal bumps for outside connection are connected with the signal pad by signal wiring sections. The power wiring sections or the ground wiring sections are respectively located adjacently on both sides of the signal wiring sections and the power wiring sections are respectively located adjacently on sides of the ground wiring sections.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: October 10, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Publication number: 20060125078
    Abstract: A semiconductor device is provided which includes a semiconductor element having power pads for supplying a power potential, ground pads for supplying a ground potential, and signal pads for inputting and outputting a signal, all of which are formed on one main surface thereof. Power bumps for outside connection are connected with the power pad by power wiring sections, ground bumps for outside connection are connected with the ground pad by ground wiring sections, and signal bumps for outside connection are connected with the signal pad by signal wiring sections. The power wiring sections or the ground wiring sections are respectively located adjacently on both sides of the signal wiring sections and the power wiring sections are respectively located adjacently on sides of the ground wiring sections.
    Type: Application
    Filed: February 7, 2006
    Publication date: June 15, 2006
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Patent number: 7030478
    Abstract: A semiconductor device including a semiconductor element having external terminals at a first level and external electrodes at a second level, higher than the first level. The external terminals include power terminals, ground terminals and signal terminals formed on a main surface of the semiconductor element. The external electrodes include power electrodes connected to the power terminals via power connecting sections, ground electrodes connected to the ground terminals via ground connecting sections and signal electrodes connected to the signal terminals via signal connecting sections. One of the signal terminals, signal electrodes and corresponding signal connecting sections are surrounded by either the power connecting sections connecting the power terminals and power electrodes or by the ground connection sections connecting the ground terminals and ground electrodes.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: April 18, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Publication number: 20050184391
    Abstract: A semiconductor device including a semiconductor element having external terminals at a first level and external electrodes at a second level, higher than the first level. The external terminals include power terminals, ground terminals and signal terminals formed on a main surface of the semiconductor element. The external electrodes include power electrodes connected to the power terminals via power connecting sections, ground electrodes connected to the ground terminals via ground connecting sections and signal electrodes connected to the signal terminals via signal connecting sections. One of the signal terminals, signal electrodes and corresponding signal connecting sections are surrounded by either the power connecting sections connecting the power terminals and power electrodes or by the ground connection sections connecting the ground terminals and ground electrodes.
    Type: Application
    Filed: April 19, 2005
    Publication date: August 25, 2005
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Patent number: 6882039
    Abstract: A semiconductor device including a semiconductor element having external terminals at a first level and external electrodes at a second level, higher than the first level. The external terminals include power terminals, ground terminals and signal terminals formed on a main surface of the semiconductor element. The external electrodes include power electrodes connected to the power terminals via power connecting sections, ground electrodes connected to the ground terminals via ground connecting sections and signal electrodes connected to the signal terminals via signal connecting sections. One of the signal terminals, signal electrodes and corresponding signal connecting sections are surrounded by either the power connecting sections connecting the power terminals and power electrodes or by the ground connection sections connecting the ground terminals and ground electrodes.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: April 19, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Patent number: 6784533
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Patent number: 6531785
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: March 11, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Publication number: 20020190336
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Application
    Filed: August 6, 2002
    Publication date: December 19, 2002
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Publication number: 20020047179
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Application
    Filed: November 20, 2001
    Publication date: April 25, 2002
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Patent number: 6326699
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: December 4, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Publication number: 20010000116
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Application
    Filed: December 8, 2000
    Publication date: April 5, 2001
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura
  • Patent number: 6211576
    Abstract: A semiconductor device is provided which is highly reliable and operable at fast speed and low noises. In this semiconductor device, there are provided a power wiring section 1003a, a ground wiring section 1003b and a signal wiring section 1003c are formed on one level. The power wiring section or the ground wiring section is formed adjacently on both sides of at least one part of the signal wiring section.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: April 3, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroya Shimizu, Asao Nishimura, Tosiho Miyamoto, Hideki Tanaka, Hideo Miura