Patents by Inventor Tosikazu Nagaki

Tosikazu Nagaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8248327
    Abstract: A scan IC includes a switch circuit and a logic circuit. The switch circuit includes first and second transistors and a level shift circuit. First and second control signals that change between a logical “1” and a logical “0” are applied to an input terminal of the logic circuit. The logic circuit applies a third control signal to the first transistor and applies a fourth control signal to the second transistor based on the applied first and second control signals. A detection circuit is connected to the input terminal of the logic circuit. An abnormality of the scan IC is detected by the detection circuit.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: August 21, 2012
    Assignee: Panasonic Corporation
    Inventors: Masaaki Kuranuki, Tosikazu Nagaki, Manabu Inoue, Tomohisa Sakaguchi, Kazuo Oohira
  • Publication number: 20100188387
    Abstract: A scan IC includes a switch circuit and a logic circuit. The switch circuit includes first and second transistors and a level shift circuit. First and second control signals that change between a logical “1” and a logical “0” are applied to an input terminal of the logic circuit. The logic circuit applies a third control signal to the first transistor and applies a fourth control signal to the second transistor based on the applied first and second control signals. A detection circuit is connected to the input terminal of the logic circuit. An abnormality of the scan IC is detected by the detection circuit.
    Type: Application
    Filed: July 18, 2008
    Publication date: July 29, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Masaaki Kuranuki, Tosikazu Nagaki, Manabu Inoue, Tomohisa Sakaguchi, Kazuo Oohira
  • Publication number: 20090096718
    Abstract: The plasma display device has the following structure: a panel having a plurality of discharge cells; an electrode-dedicated power supply for generating voltage to be applied to any one of the electrodes disposed on the panel; a driving-waveform generator that has a switching element for outputting voltage of the electrode-dedicated power supply so as to generate a waveform of driving voltage for driving the electrodes; a switch controller for controlling the switching element; a controller-dedicated power supply for supplying the switch controller with electric power; and an auxiliary power supply that generates a voltage lower than that of the controller-dedicated power supply by reducing voltage of the electrode-dedicated power supply so as to supply the switch controller with electric power.
    Type: Application
    Filed: January 9, 2008
    Publication date: April 16, 2009
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Fumito Kusama, Tosikazu Nagaki, Masaaki Kuranuki