Patents by Inventor Tosiyuki Honda

Tosiyuki Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5724233
    Abstract: A chip-on chip type semiconductor device is provided in which semiconductor chips provided in a package cannot be displaced during a transfer molding process so as to eliminate a short circuit. At least two lead frames are provided in and extend from the package so that the first semiconductor chip and the second semiconductor chip can be electrically connected to external devices. A die stage is provided between the first semiconductor chip and the second semiconductor chip. A bonding wire is provided for wiring between the first semiconductor chip and the lead frames, and TAB leads connect the second semiconductor chip to the lead frames. The lead frames may extend between the first and second semiconductor devices instead of the die stage. The lead frames may include one having a portion extending in a direction perpendicular to the longitudinal direction of the lead frames between the first and second semiconductor chips.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: March 3, 1998
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Tosiyuki Honda, Takao Haranosono
  • Patent number: 5579208
    Abstract: A chip-on chip type semiconductor device is provided in which semiconductor chips provided in a package cannot be displaced during a transfer molding process so as to eliminate a short circuit. At least two lead frames are provided in and extend from the package so that the first semiconductor chip and the second semiconductor chip can be electrically connected to external devices. A die stage is provided between the first semiconductor chip and the second semiconductor chip. A bonding wire is provided for wiring between the first semiconductor chip and the lead frames, and TAB leads connect the second semiconductor chip to the lead frames. The lead frames may extend between the first and second semiconductor devices instead of the die stage. The lead frames may include one having a portion extending in a direction perpendicular to the longitudinal direction of the lead frames between the first and second semiconductor chips.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: November 26, 1996
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Tosiyuki Honda, Takao Haranosono
  • Patent number: 5479051
    Abstract: A semiconductor device includes at least a first semiconductor chip and a second semiconductor chip each having a first surface and a second surface. The second surface of the first semiconductor chip confronts the first surface of the second semiconductor chip. Additionally, the semiconductor device includes a plurality of leads having inner portions and outer portions, where the inner portions of the leads are electrically coupled to selected portions on one of the first and second surfaces of each of the first and second semiconductor chips. An insulator is interposed between the second surface of the first semiconductor chip and the first surface of the second semiconductor chip at portions other than the selected portions. Further, a resin package encapsulates the first and second semiconductor chips so that the outer portions of the leads project outside the resin package.
    Type: Grant
    Filed: September 24, 1993
    Date of Patent: December 26, 1995
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Masaki Waki, Tosiyuki Honda, Yukio Gomi
  • Patent number: 5471369
    Abstract: A chip-on chip type semiconductor device is provided in which semiconductor chips provided in a package cannot be displaced during a transfer molding process so as to eliminate a short circuit. At least two lead frames are provided in and extend from the package so that the first semiconductor chip and the second semiconductor chip can be electrically connected to external devices. A die stage is provided between the first semiconductor chip and the second semiconductor chip. A bonding wire is provided for wiring between the first semiconductor chip and the lead frames, and TAB leads connect the second semiconductor chip to the lead frames. The lead frames may extend between the first and second semiconductor devices instead of the die stage. The lead frames may include one having a portion extending in a direction perpendicular to the longitudinal direction of the lead frames between the first and second semiconductor chips.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: November 28, 1995
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Tosiyuki Honda, Takao Haranosono
  • Patent number: 5361970
    Abstract: A semiconductor integrated circuit device includes a semiconductor element having pads, a lead frame stage on which the semiconductor element is mounted, and a plurality of terminal members mounted on the lead frame stage and located outside the semiconductor element, the terminal members respectively having electrically conductive patterns and being made of a material identical to a material of which the semiconductor element is made. The device includes inner leads spaced part from the lead frame stage, a first group of bonding members connecting the pads of the semiconductor element and the electrically conductive patterns of the terminal members to each other, and a second group of bonding members connecting the electrically conductive patterns of the terminal members and the inner leads to each other.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: November 8, 1994
    Assignee: Fujitsu Limited
    Inventors: Junichi Kasai, Michio Sono, Tosiyuki Honda
  • Patent number: 5309016
    Abstract: A semiconductor integrated circuit device includes a semiconductor element having pads, a lead frame stage on which the semiconductor element is mounted, and a plurality of terminal members mounted on the lead frame stage and located outside the semiconductor element, the terminal members respectively having electrically conductive patterns and being made of a material identical to a material of which the semiconductor element is made. The device includes inner leads spaced part from the lead frame stage, a first group of bonding members connecting the pads of the semiconductor element and the electrically conductive patterns of the terminal members to each other, and a second group of bonding members connecting the electrically conductive patterns of the terminal members and the inner leads to each other.
    Type: Grant
    Filed: May 29, 1992
    Date of Patent: May 3, 1994
    Assignee: Fujitsu Limited
    Inventors: Junichi Kasai, Michio Sono, Tosiyuki Honda