Abstract: Disclosed is a semiconductor device that reduces the area of a transistor in a ReRAM. A plurality of memory cells differ from each other in the combination of bit line and plate line. The potential of plate line PL2 is a forming voltage. By contrast, the potentials of the other plate lines are +Vi. The potential of bit line BL2 is 0 V (ground potential). By contrast, the potentials of the other bit lines are +Vi. The potential of is +Vgf. By contrast, the potentials of the other word lines are +Vi.

Abstract: Disclosed is a semiconductor device that reduces the area of a transistor in a ReRAM. A plurality of memory cells differ from each other in the combination of bit line and plate line. The potential of plate line PL2 is a forming voltage. By contrast, the potentials of the other plate lines are +Vi. The potential of bit line BL2 is 0 V (ground potential). By contrast, the potentials of the other bit lines are +Vi. The potential of is +Vgf. By contrast, the potentials of the other word lines are +Vi.

Abstract: A method of making a semiconductor device patterns a first fin in a pFET region, and patterns a second fin in an nFET region. A plurality of conformal microlayers containing a straining material are deposited on the first and second fins. A protective cap material is formed on the first fin, and the conformal layers are selectively removed from the second fin. The straining material is then thermally diffused into the first fin. The protective cap material is removed from the first fin after the thermal annealing and after the conformal micro layers are selectively removed from the second fin.

Abstract: A method of making a semiconductor device patterns a first fin in a pFET region, and patterns a second fin in an nFET region. A plurality of conformal microlayers containing a straining material are deposited on the first and second fins. A protective cap material is formed on the first fin, and the conformal layers are selectively removed from the second fin. The straining material is then thermally diffused into the first fin. The protective cap material is removed from the first fin after the thermal annealing and after the conformal micro layers are selectively removed from the second fin.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulator, a gate insulating film formed on the semiconductor layer, a gate electrode formed on the gate insulating film and extending in a first direction, source/drain regions formed in the semiconductor layer on both sides of the gate electrode, a body contact region in the semiconductor layer, a partial isolating region in which a field insulating film thicker than the gate insulating film intervenes between the semiconductor layer and an extending portion of the gate electrode, and a full isolating region in which the semiconductor layer on the insulator is removed. The full isolating region is formed to be in contact with at least a part of a side parallel to the first direction of the source/drain regions.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulator, a gate insulating film formed on the semiconductor layer, a gate electrode formed on the gate insulating film and extending in a first direction, source/drain regions formed in the semiconductor layer on both sides of the gate electrode, a body contact region in the semiconductor layer, a partial isolating region in which a field insulating film thicker than the gate insulating film intervenes between the semiconductor layer and an extending portion of the gate electrode, and a full isolating region in which the semiconductor layer on the insulator is removed. The full isolating region is formed to be in contact with at least a part of a side parallel to the first direction of the source/drain regions.

Abstract: A MIS transistor has a gate insulating film made of silicon oxynitride and having a specific dielectric constant which is larger than the expected specific dielectric constant calculated based on a weighted average of the specific dielectric constants based on the weight ratio of the silicon oxide and the silicon nitride contained in the silicon oxynitride film. The gate insulating film having a smaller thickness prevents impurities in the overlying gate electrode from penetrating through the gate insulating film to degrade the silicon substrate.

Abstract: A MIS transistor has a gate insulating film made of silicon oxynitride and having a specific dielectric constant which is larger than the expected specific dielectric constant calculated based on a weighted average of the specific dielectric constants based on the weight ratio of the silicon oxide and the silicon nitride contained in the silicon oxynitride film. The gate insulating film having a smaller thickness prevents impurities in the overlying gate electrode from penetrating through the gate insulating film to degrade the silicon substrate.

Abstract: Using a lamination of a tungsten silicide layer and a non-doped polysilicon layer as a mask, a dopant impurity is ion implanted into a semiconductor substrate so as to form impurity regions and dope the tungsten silicide layer with the dopant impurity, and the dopant impurity is diffused from the tungsten silicide layer into the non-doped polysilicon layer during the activation of the dopant impurity introduced into the substrate, thereby making the process simple.

Abstract: An apparatus for measuring a diamond color comprises a light source composed of a lamp and an integrating sphere for diffusing light therein emitted from the lamp; a diamond holder including diamond supporting head means and suction base means, thereby positioning the table facet of the diamond in the integrating sphere for allowing the diffused light from the light source to fall on the table facet of the diamond; a monochromator for separating a beam of light as it emerges from the diamond through the table facet side into a spectrum; a photodetector for detecting the light from the monochromator; variable slit means disposed in at least one of the monochromator and the photodetector for adjusting the size of the beam of light to a diameter of the diamond; a measurement unit for controlling at least the monochromator to obtain a spectrum of the light which has passed through the diamond; and an arithmetic unit for deriving tristimulus values X, Y and Z from the spectrum of the light from the diamond; which