Abstract: Embodiments of the present invention relate to the detection of synchronization marks in data storage and retrieval. To detect a synchronization mark, embodiments of the present invention require both pattern matching and proper phase alignment, following a repeating synchronization field. According to one particular embodiment, proper phase alignment following a repeated four bit synchronization field, is utilized in conjunction with pattern matching, to identify a synchronization mark. By allowing a synchronization mark to be identified only with proper phase alignment at the earliest possible occurrence of the synchronization mark, accuracy of synchronization mark detection may be improved.

Abstract: A system corrects errors in a codeword. The system includes a channel that sorts reliability numbers of symbols in the codeword to create an ordered list of candidate erasure locations. The system also includes a generalized minimum distance decoder that iteratively processes the ordered list of candidate erasure locations and at least two syndromes of the codeword using a single-shot key equation solver to generate an error locator polynomial and an error evaluator polynomial. The generalized minimum distance decoder processes the least reliable candidate erasure locations first within the ordered list of candidate erasure locations.

Abstract: A system corrects errors in a bit stream. The system includes an encoder and a decoder. The encoder encodes the bit stream using a low density parity check code by inserting parity check bits into the bit stream to generate codewords. The decoder decodes the codewords using parity check equations that are based on the low density parity check code. The parity check bits may comprise no more than four percent of the bits in the codewords of the low density parity check code. The low density parity check code can have a minimum separation of at least 7 between any two ones in each row of a parity-check matrix that is based on the low density parity check code. The encoder and the decoder can be defined in hardware using logic circuits that are interconnected to implement a trellis based on the low density parity check code.

Abstract: A data storage device includes a first filter that generates a short DC equalization target in response to a read back signal generated from magnetic patterns that are recorded on a storage medium using perpendicular recording. The data storage device also includes a first detector that generates an output sequence in response to the short DC equalization target. The data storage device also includes a high pass filter that attenuates DC components of the short DC equalization target and that passes low frequency components of the short DC equalization target above a cutoff frequency to generate a filtered signal. The data storage device also includes a second detector that processes the output sequence in response to the filtered signal.

Abstract: Techniques are provided that generate bit reliabilities for a detected sequence. A detector generates the detected sequence. According to one embodiment, a post-processor finds a first set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the first bit value, finds a second set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the second bit value, selects a first most likely combination of one or more events of the first set and a second most likely combination of one or more events of the second set, and generates a bit reliability based on the first and the second most likely values.

Abstract: A detector generates a detected sequence, and a post processor generates probability values that indicate the likelihood of a plurality of error events in the detected sequence. The post processor partitions the values into first and second subsets. The post processor selects a first most likely value from the first subset of the values and a second most likely value from the second subset of the values. The post processor generates a bit reliability based on the first and the second most likely values.

Abstract: Embodiments include a method and apparatus for drilling holes or cutting at specified locations on a beam or other material, even if the beam is offset from an ideal beam configuration. In some embodiments, the apparatus is configured to determine the correct locations of holes in the beam despite the beam's offset and drill holes in the beam according to this determination. The apparatus may be capable of drilling holes at specified locations on a web of an I-beam. In some embodiments, the method comprises determining the correct locations of the holes in the particular beam using the apparatus and drilling the holes in the correct locations in the beam according to that determination. Some embodiments include using one or more clamping mechanisms and one or more drilling members to determine the correct locations of the holes in the particular beam.

Abstract: Techniques are provided for iteratively decoding data recorded on a data storage device. An iterative decoder decodes the data using multiple decoding iterations to correct errors. In multiple iterations of the iterative decoder, a post processing block generates soft information, and a decoder applies a minimum sum decoding algorithm to a low density parity check (LDPC) code to generate extrinsic information based on the soft information and updated soft information.

Abstract: The invention includes apparatus and methods that allow a data storage device perform an enhanced data recovery procedure (DRP) that includes obtaining a new digital sampling of the voltages for the failing unit of data by re-reading the analog signal and converting it to digital form using an analog-to-digital conversion (ADC) using a fixed phase clock signal. The data samples are re-interpolated using a programmable delay line. The digital values representing the voltages are stored a buffer so that the data can be processed repeatedly using varying parameters as part of the data recovery procedure. Optionally the samples stored in the buffer can be processed in the reverse direction (from end of sector to beginning of sector) without requiring modification of the standard Viterbi detector since it inherently works on data processed in either direction.

Abstract: A hard disk drive (HDD) holds data using a biphase scheme. A plurality of matched filters are used to detect binary data represented by the biphase pattern without the need for synchronous sampling or equalization.

Abstract: Techniques for real-time observation assessment are provided. The techniques, which are designed for educators, take advantage of handheld computers, desktop/laptop computers and Internet access in order to reduce the paperwork associated with conventional educational assessments. An array of instructional assessment applications are designed to run on handheld computers. The instructional assessment applications may be based on existing and widely used paper methodologies. An instructional assessment application includes a self-correct feature that marks an incorrect response as a self-corrected response based upon selection of the self-correct feature.

Abstract: A method and apparatus are provided for implementing enhanced data channel performance using a read sample buffer in a direct access storage device (DASD). Disk data is read and stored in the read sample buffer. When a data recovery procedure (DRP) starts, the stored disk read data in the read sample buffer is detected. Error correction code (ECC) checking of the detected sample buffer disk data is performed to identify correctly recovered data. Using the disk read data stored in the read sample buffer enables data recovery without identification of a sync word. Also using the disk read data stored in the read sample buffer enables data recovery with changed channel data detection settings to recover the data. The read sample buffer can be used for accumulating read disk data from more than one read operation so that at least some channel noise is averaged out.

Abstract: A method and apparatus are provided for implementing enhanced data channel performance using a read sample buffer in a direct access storage device (DASD). Disk data is read and stored in the read sample buffer. When a data recovery procedure (DRP) starts, the stored disk read data in the read sample buffer is detected. Error correction code (ECC) checking of the detected sample buffer disk data is performed to identify correctly recovered data. Using the disk read data stored in the read sample buffer enables data recovery without identification of a sync word. Also using the disk read data stored in the read sample buffer enables data recovery with changed channel data detection settings to recover the data. The read sample buffer can be used for accumulating read disk data from more than one read operation so that at least some channel noise is averaged out.