Abstract: An arbitration elimination scheme for a bus. In a preferred embodiment, a programmable counter determines when a SCSI bus idle condition is reached and when a portion of an arbitration window for the bus has passed without participants. If there are no participants for arbitration, the SCSI initiator eliminates arbitration by asserting SEL and issuing initiator/target IDS. If any other device attempts to arbitrate at this time, the device sees SEL asserted and does not attempt to participate in arbitration.

Abstract: A system and method for implementing logic changes in integrated circuits (ICs). In a preferred embodiment, donor logic elements are taken from donator logic paths. The donated cells are implemented into a logic path altered by an ECO. The donated cell is replaced by spare cells. Timing analysis is done to ensure all logic paths are timing closed.

Abstract: The present invention is a method, system, and product for optimizing timing in a circuit after layout of the circuit has been completed. The circuit includes at least one variable delay line and includes coupled endpoint devices. The variable delay line includes multiple, different selectable settings. A current setting of the variable delay line is varied from a maximum setting to a minimum setting. A timing accuracy indicator of a combination of the coupled endpoint devices is determined as the variable delay line is varied from its maximum setting to its minimum setting. Thus, multiple timing accuracy indicators are determined where an indicator is determined for and associated with each one of the settings from the maximum setting to the minimum setting. An optimum one of the selectable settings is determined utilizing the timing accuracy indicators, wherein the optimum one of the settings is associated with an optimum one of the multiple timing accuracy indicators.

Abstract: An arbitration elimination scheme for a bus. In a preferred embodiment, a programmable counter determines when a SCSI bus idle condition is reached and when a portion of an arbitration window for the bus has passed without participants. If there are no participants for arbitration, the SCSI initiator eliminates arbitration by asserting SEL and issuing initiator/target IDS. If any other device attempts to arbitrate at this time, the device sees SEL asserted and does not attempt to participate in arbitration.

Abstract: A system and method for implementing logic changes in integrated circuits (ICs). In a preferred embodiment, donor logic elements are taken from donator logic paths. The donated cells are implemented into a logic path altered by an ECO. The donated cell is replaced by spare cells. Timing analysis is done to ensure all logic paths are timing closed.

Abstract: The present invention is a method, system, and product for optimizing timing in a circuit after layout of the circuit has been completed. The circuit includes at least one variable delay line and includes coupled endpoint devices. The variable delay line includes multiple, different selectable settings. A current setting of the variable delay line is varied from a maximum setting to a minimum setting. A timing accuracy indicator of a combination of the coupled endpoint devices is determined as the variable delay line is varied from its maximum setting to its minimum setting. Thus, multiple timing accuracy indicators are determined where an indicator is determined for and associated with each one of the settings from the maximum setting to the minimum setting. An optimum one of the selectable settings is determined utilizing the timing accuracy indicators, wherein the optimum one of the settings is associated with an optimum one of the multiple timing accuracy indicators.