Patents by Inventor Travis William LOVITT
Travis William LOVITT has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10056883Abstract: An SR latch circuit with single gate delay is provided. The circuit has an enable input and an SR latch. There is first input stage having an input for receiving a set input and having an output for producing a first component of the SR latch circuit output, the first input stage having only one transistor that receives the enable input, the first input stage becoming transparent while enabled, the first input stage having a single gate delay between the input of the first input stage and the output of the first input stage. There is a second input stage having an input for receiving a reset input and having an output for producing a second component of the SR latch circuit output, the second input stage having only one transistor that receives the enable input, the second input stage becoming transparent while enabled, the second input stage having a single gate delay between the input of the second input stage and the output of the second input stage.Type: GrantFiled: March 6, 2017Date of Patent: August 21, 2018Assignee: INPHI CORPORATIONInventor: Travis William Lovitt
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Publication number: 20170179934Abstract: An SR latch circuit with single gate delay is provided. The circuit has an an enable input and an SR latch. There is first input stage having an input for receiving a set input and having an output for producing a first component of the SR latch circuit output, the first input stage having only one transistor that receives the enable input, the first input stage becoming transparent while enabled, the first input stage having a single gate delay between the input of the first input stage and the output of the first input stage. There is a second input stage having an input for receiving a reset input and having an output for producing a second component of the SR latch circuit output, the second input stage having only one transistor that receives the enable input, the second input stage becoming transparent while enabled, the second input stage having a single gate delay between the input of the second input stage and the output of the second input stage.Type: ApplicationFiled: March 6, 2017Publication date: June 22, 2017Inventor: Travis William LOVITT
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Patent number: 9660841Abstract: Receiver circuitry is disclosed that can take circuit branches offline to possibly adapt an offset value. In one embodiment, a circuit in a receiver has at least two branches. Each branch includes an adjustor to adjust the branch signal by an offset value. Selection circuitry takes one of the branches offline by selecting the output of that branch as an offline value, and by selecting the output of one or more of the other branches as a data decision value. The selection circuitry changes which branch is taken offline during the operation of the circuit. When a branch is taken offline, an offset value associated with that branch may be updated, if necessary.Type: GrantFiled: September 9, 2016Date of Patent: May 23, 2017Assignee: INPHI CORPORATIONInventors: Stephane Dallaire, Benjamin P. Smith, Travis William Lovitt, Arash Farhoodfar
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Patent number: 9628055Abstract: An SR latch circuit with single gate delay is provided. The circuit has an enable input and an SR latch. There is first input stage having an input for receiving a set input and having an output for producing a first component of the SR latch circuit output, the first input stage having only one transistor that receives the enable input, the first input stage becoming transparent while enabled, the first input stage having a single gate delay between the input of the first input stage and the output of the first input stage. There is a second input stage having an input for receiving a reset input and having an output for producing a second component of the SR latch circuit output, the second input stage having only one transistor that receives the enable input, the second input stage becoming transparent while enabled, the second input stage having a single gate delay between the input of the second input stage and the output of the second input stage.Type: GrantFiled: September 24, 2015Date of Patent: April 18, 2017Assignee: INPHI CORPORATIONInventor: Travis William Lovitt
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Publication number: 20170093379Abstract: An SR latch circuit with single gate delay is provided. The circuit has an an enable input and an SR latch. There is first input stage having an input for receiving a set input and having an output for producing a first component of the SR latch circuit output, the first input stage having only one transistor that receives the enable input, the first input stage becoming transparent while enabled, the first input stage having a single gate delay between the input of the first input stage and the output of the first input stage. There is a second input stage having an input for receiving a reset input and having an output for producing a second component of the SR latch circuit output, the second input stage having only one transistor that receives the enable input, the second input stage becoming transparent while enabled, the second input stage having a single gate delay between the input of the second input stage and the output of the second input stage.Type: ApplicationFiled: September 24, 2015Publication date: March 30, 2017Applicant: INPHI CORPORATIONInventor: TRAVIS WILLIAM LOVITT
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Publication number: 20160380784Abstract: Receiver circuitry is disclosed that can take circuit branches offline to possibly adapt an offset value. In one embodiment, a circuit in a receiver has at least two branches. Each branch includes an adjustor to adjust the branch signal by an offset value. Selection circuitry takes one of the branches offline by selecting the output of that branch as an offline value, and by selecting the output of one or more of the other branches as a data decision value. The selection circuitry changes which branch is taken offline during the operation of the circuit. When a branch is taken offline, an offset value associated with that branch may be updated, if necessary.Type: ApplicationFiled: September 9, 2016Publication date: December 29, 2016Inventors: Stephane DALLAIRE, Benjamin P. SMITH, Travis William LOVITT, Arash FARHOODFAR
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Patent number: 9467315Abstract: Receiver circuitry is disclosed that can take circuit branches offline to possibly adapt an offset value. In one embodiment, a circuit in a receiver has at least two branches. Each branch includes an adjustor to adjust the branch signal by an offset value. Selection circuitry takes one of the branches offline by selecting the output of that branch as an offline value, and by selecting the output of one or more of the other branches as a data decision value. The selection circuitry changes which branch is taken offline during the operation of the circuit. When a branch is taken offline, an offset value associated with that branch may be updated, if necessary.Type: GrantFiled: July 22, 2015Date of Patent: October 11, 2016Assignee: Inphi CorporationInventors: Stephane Dallaire, Benjamin P. Smith, Travis William Lovitt, Arash Farhoodfar
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Patent number: 9350335Abstract: A combined multiplexer and latch circuit is provided that has only a single gate delay between the input of the overall circuit and the output of the circuit. Two complementary input signal stages each receive a complementary input signal and a multiplexer input. A clocked preset circuit presets a signal at the output of the combined multiplexer and latch circuit with timing based on a first phase of an input clock. A storage circuit stores a value based on the output of the combined multiplexer and latch circuit with timing based on a second phase of the input clock. The circuit has a preset mode during which the output of the combined multiplexer and latch circuit is preset, and has a latch mode during which a value output by the selected complementary signal input stage is output by the circuit and also stored in the storage circuit.Type: GrantFiled: September 24, 2015Date of Patent: May 24, 2016Assignee: INPHI CORPORATIONInventor: Travis William Lovitt
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Publication number: 20160028562Abstract: Receiver circuitry is disclosed that can take circuit branches offline to possibly adapt an offset value. In one embodiment, a circuit in a receiver has at least two branches. Each branch includes an adjustor to adjust the branch signal by an offset value. Selection circuitry takes one of the branches offline by selecting the output of that branch as an offline value, and by selecting the output of one or more of the other branches as a data decision value. The selection circuitry changes which branch is taken offline during the operation of the circuit. When a branch is taken offline, an offset value associated with that branch may be updated, if necessary.Type: ApplicationFiled: July 22, 2015Publication date: January 28, 2016Inventors: Stephane DALLAIRE, Benjamin P. SMITH, Travis William LOVITT, Arash FARHOODFAR