Abstract: A boot charge circuit for charging a boot capacitor of a switching power converter with upper and lower switches including pulse circuitry that provides a boot refresh pulse in response to a pulse control signal transitioning to an active state to turn on the lower switch for a duration of the boot refresh pulse, and gate circuitry that prevents activation of the upper switch until after completion of the boot refresh pulse in response to the transitioning of the pulse control signal. The boot refresh pulse has a negligible duration relative to each switching cycle yet sufficient to charge the boot capacitor to enable a driver to turn on the upper switch. A load monitor may be included to disable the pulse circuitry from providing the boot refresh pulse during higher load levels.

Abstract: A boot charge circuit for charging a boot capacitor of a switching power converter with upper and lower switches including pulse circuitry that provides a boot refresh pulse in response to a pulse control signal transitioning to an active state to turn on the lower switch for a duration of the boot refresh pulse, and gate circuitry that prevents activation of the upper switch until after completion of the boot refresh pulse in response to the transitioning of the pulse control signal. The boot refresh pulse has a negligible duration relative to each switching cycle yet sufficient to charge the boot capacitor to enable a driver to turn on the upper switch. A load monitor may be included to disable the pulse circuitry from providing the boot refresh pulse during higher load levels.

Abstract: Various methods and devices that involve control circuits for power converters are disclosed. One method comprises controlling a switch using a control signal based on a comparison signal. The switch controls a transfer of power between an input node, which receives an input, and an output node. The method comprises measuring an output of the power converter, generating an error signal based on the output, generating a periodic ramp signal with a varying period, providing the error signal to a first input terminal of a comparator, providing the ramp signal to a second input terminal of the comparator, and generating the comparison signal based on the error signal and the ramp signal using the comparator. The method comprises increasing a slope of the ramp signal in response to an increase in the input, and increasing the slope of the ramp signal in response to a decrease in the varying period.

Abstract: Various methods and devices that involve control circuits for power converters are disclosed. One method comprises controlling a switch using a control signal based on a comparison signal. The switch controls a transfer of power between an input node, which receives an input, and an output node. The method comprises measuring an output of the power converter, generating an error signal based on the output, generating a periodic ramp signal with a varying period, providing the error signal to a first input terminal of a comparator, providing the ramp signal to a second input terminal of the comparator, and generating the comparison signal based on the error signal and the ramp signal using the comparator. The method comprises increasing a slope of the ramp signal in response to an increase in the input, and increasing the slope of the ramp signal in response to a decrease in the varying period.

Abstract: Various methods and devices that involve control circuits for power converters are disclosed. One method comprises controlling a switch using a control signal based on a comparison signal. The switch controls a transfer of power between an input node, which receives an input, and an output node. The method comprises measuring an output of the power converter, generating an error signal based on the output, generating a periodic ramp signal with a varying period, providing the error signal to a first input terminal of a comparator, providing the ramp signal to a second input terminal of the comparator, and generating the comparison signal based on the error signal and the ramp signal using the comparator. The method comprises increasing a slope of the ramp signal in response to an increase in the input, and increasing the slope of the ramp signal in response to a decrease in the varying period.

Abstract: Various methods and devices that involve electronic circuits are disclosed. A disclosed method includes buffering an input signal using a first buffer. The first buffer is powered by a supply voltage and a reference voltage. The method also includes buffering the input signal using a second buffer. The second buffer is powered by the reference voltage and a ground voltage. The method also includes level shifting a first buffer output signal of the first buffer to a voltage range using a first level shifter, and level shifting a second buffer output signal of the second buffer to the voltage range using a second level shifter. The voltage range is larger than a delta between the supply voltage and the reference voltage. The reference voltage is greater than one quarter of the supply voltage and less than three quarters of the supply voltage.

Abstract: A configuration circuit for obtaining a digital code includes a controller circuit that generates a plurality of multibit control words. A digitally controlled current source circuit receives a multibit control word generated by the controller circuit. The digitally controlled current source circuit generates an output current that corresponds to the multibit control word in accordance with a predetermined output curve. A test voltage node receives the output current, and a test voltage develops in response to the output current. A reference voltage node develops a reference voltage, the level of which is independent of the multibit control word. A voltage comparison circuit (i) receives the test voltage and the reference voltage, (ii) compares the two voltages to produce a comparison result and (iii) sends the comparison result to the controller circuit. The digital code is obtained by the configuration circuit using the comparison result and the multibit control word.

Abstract: Power converters and their methods of operation are described. An example method involves regulating an output using a switching circuit that responds to a control signal. The method involves comparing a feedback voltage from the output to a reference voltage using an error amplifier to create an error voltage, and comparing the error voltage to a ramp voltage from a periodic ramp signal using a comparator to create a PWM signal. The PWM signal is used in combination with the switching circuit to regulate the output. The method involves: clamping the error voltage, using a clamping circuit, if the error voltage drops below a lowest value for the periodic ramp signal while the power converter is regulating a load; and unclamping the error voltage, using the clamping circuit, if the error voltage rises above the lowest value for the periodic ramp signal while the power converter is regulating the load.

Abstract: A configuration circuit for obtaining a digital code includes a controller circuit that generates a plurality of multibit control words. A digitally controlled current source circuit receives a multibit control word generated by the controller circuit. The digitally controlled current source circuit generates an output current that corresponds to the multibit control word in accordance with a predetermined output curve. A test voltage node receives the output current, and a test voltage develops in response to the output current. A reference voltage node develops a reference voltage, the level of which is independent of the multibit control word. A voltage comparison circuit (i) receives the test voltage and the reference voltage, (ii) compares the two voltages to produce a comparison result and (iii) sends the comparison result to the controller circuit. The digital code is obtained by the configuration circuit using the comparison result and the multibit control word.

Abstract: Various methods and devices that involve electronic circuits are disclosed. A disclosed method includes buffering an input signal using a first buffer. The first buffer is powered by a supply voltage and a reference voltage. The method also includes buffering the input signal using a second buffer. The second buffer is powered by the reference voltage and a ground voltage. The method also includes level shifting a first buffer output signal of the first buffer to a voltage range using a first level shifter, and level shifting a second buffer output signal of the second buffer to the voltage range using a second level shifter. The voltage range is larger than a delta between the supply voltage and the reference voltage. The reference voltage is greater than one quarter of the supply voltage and less than three quarters of the supply voltage.

Abstract: Various methods and devices that involve control circuits for power converters are disclosed. One method comprises controlling a switch using a control signal based on a comparison signal. The switch controls a transfer of power between an input node, which receives an input, and an output node. The method comprises measuring an output of the power converter, generating an error signal based on the output, generating a periodic ramp signal with a varying period, providing the error signal to a first input terminal of a comparator, providing the ramp signal to a second input terminal of the comparator, and generating the comparison signal based on the error signal and the ramp signal using the comparator. The method comprises increasing a slope of the ramp signal in response to an increase in the input, and increasing the slope of the ramp signal in response to a decrease in the varying period.

Abstract: Various methods and devices that involve electronic circuits are disclosed. A disclosed method includes buffering an input signal using a first buffer. The first buffer is powered by a supply voltage and a reference voltage. The method also includes buffering the input signal using a second buffer. The second buffer is powered by the reference voltage and a ground voltage. The method also includes level shifting a first buffer output signal of the first buffer to a voltage range using a first level shifter, and level shifting a second buffer output signal of the second buffer to the voltage range using a second level shifter. The voltage range is larger than a delta between the supply voltage and the reference voltage. The reference voltage is greater than one quarter of the supply voltage and less than three quarters of the supply voltage.

Abstract: Power converters their methods of operation are described. An example method includes regulating an output using a switching circuit that responds to a control signal. The method includes comparing a feedback voltage from the output to a reference voltage using an error amplifier to create an error voltage, and comparing the error voltage to a ramp voltage from a periodic ramp signal using a comparator to create a PWM signal. The PWM signal is used in combination with the switching circuit to regulate the output. The method includes: clamping the error voltage, using a clamping circuit, if the error voltage drops below a lowest value for the periodic ramp signal while the power converter is regulating a load; and unclamping the error voltage, using the clamping circuit, if the error voltage rises above the lowest value for the periodic ramp signal while the power converter is regulating the load.

Abstract: Various methods and devices that involve electronic circuits are disclosed. A disclosed method includes buffering an input signal using a first buffer. The first buffer is powered by a supply voltage and a reference voltage. The method also includes buffering the input signal using a second buffer. The second buffer is powered by the reference voltage and a ground voltage. The method also includes level shifting a first buffer output signal of the first buffer to a voltage range using a first level shifter, and level shifting a second buffer output signal of the second buffer to the voltage range using a second level shifter. The voltage range is larger than a delta between the supply voltage and the reference voltage. The reference voltage is greater than one quarter of the supply voltage and less than three quarters of the supply voltage.

Abstract: Various methods and devices that involve control circuits for power converters are disclosed. One method comprises controlling a switch using a control signal based on a comparison signal. The switch controls a transfer of power between an input node, which receives an input, and an output node. The method comprises measuring an output of the power converter, generating an error signal based on the output, generating a periodic ramp signal with a varying period, providing the error signal to a first input terminal of a comparator, providing the ramp signal to a second input terminal of the comparator, and generating the comparison signal based on the error signal and the ramp signal using the comparator. The method comprises increasing a slope of the ramp signal in response to an increase in the input, and increasing the slope of the ramp signal in response to a decrease in the varying period.

Abstract: A configuration circuit for obtaining a digital code includes a controller circuit that generates a plurality of multibit control words. A digitally controlled current source circuit receives a multibit control word generated by the controller circuit. The digitally controlled current source circuit generates an output current that corresponds to the multibit control word in accordance with a predetermined output curve. A test voltage node receives the output current, and a test voltage develops in response to the output current. A reference voltage node develops a reference voltage, the level of which is independent of the multibit control word. A voltage comparison circuit (i) receives the test voltage and the reference voltage, (ii) compares the two voltages to produce a comparison result and (iii) sends the comparison result to the controller circuit. The digital code is obtained by the configuration circuit using the comparison result and the multibit control word.

Abstract: Power converters their methods of operation are described. An example method includes regulating an output using a switching circuit that responds to a control signal. The method includes comparing a feedback voltage from the output to a reference voltage using an error amplifier to create an error voltage, and comparing the error voltage to a ramp voltage from a periodic ramp signal using a comparator to create a PWM signal. The PWM signal is used in combination with the switching circuit to regulate the output. The method includes: clamping the error voltage, using a clamping circuit, if the error voltage drops below a lowest value for the periodic ramp signal while the power converter is regulating a load; and unclamping the error voltage, using the clamping circuit, if the error voltage rises above the lowest value for the periodic ramp signal while the power converter is regulating the load.

Abstract: Various methods and devices that involve electronic circuits are disclosed. A disclosed method includes buffering an input signal using a first buffer. The first buffer is powered by a supply voltage and a reference voltage. The method also includes buffering the input signal using a second buffer. The second buffer is powered by the reference voltage and a ground voltage. The method also includes level shifting a first buffer output signal of the first buffer to a voltage range using a first level shifter, and level shifting a second buffer output signal of the second buffer to the voltage range using a second level shifter. The voltage range is larger than a delta between the supply voltage and the reference voltage. The reference voltage is greater than one quarter of the supply voltage and less than three quarters of the supply voltage.

Abstract: A multiphase controller for a PWM power converter employs a single current sense device to measure input current, I, and an integrator at each phase to accurately measure power delivered during a pulse. The integrator monitors current delivered through a circuit which delivers a current signal scaled to I/N where N is the number of active phases. Thus where there are three overlapping phases, one-third of I is delivered to the integrator for each phase that is on or active. The integrator provides a Charge Ramp signal to an input of a Pulse Width Modulation (PWM) comparator associated with each phase. The other input of the PWM comparator is tied to an error control signal common to all of the phases. When the Charge Ramp signal and the error control signal match, the corresponding phase is turned off for the duration of the cycle.

Abstract: A nonlinear transconductance provides a nonlinear output in response to a differential signal input. In a switch-type closed loop system, such as switching mode DC—DC converter of phase lock loop, the nonlinear transconductance amplifier provides a very fast response time. The nonlinear transconductance amplifier is a linear transconductance amplifier that has been modified to include a nonlinear output stage of current mirrors having resistive elements connected to the emitters of the diode connected transistors in the current mirrors.