Abstract: The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.

Abstract: In an embodiment, a system includes a power management unit (PMU), a non-volatile memory, a volatile memory, and a processor. The PMU may be configured to generate a power supply voltage, change a state of a status signal responsive to an event, and reduce a voltage level of the power supply voltage responsive to a predetermined period of time elapsing from detecting the event. The system may be configured to transition from a first to a second operating mode responsive to the change of the state of the status signal, and cancel pending commands to the non-volatile memory responsive to the transition to the second operating mode. The non-volatile memory may be configured to complete active commands prior the predetermined period of time elapsing.

Abstract: In an embodiment, a system includes a power management unit (PMU), a non-volatile memory, a volatile memory, and a processor. The PMU may be configured to generate a power supply voltage, change a state of a status signal responsive to an event, and reduce a voltage level of the power supply voltage responsive to a predetermined period of time elapsing from detecting the event. The system may be configured to transition from a first to a second operating mode responsive to the change of the state of the status signal, and cancel pending commands to the non-volatile memory responsive to the transition to the second operating mode. The non-volatile memory may be configured to complete active commands prior the predetermined period of time elapsing.