Abstract: Systems, methods, and apparatus related to memory devices. In one approach, an artificial intelligence system uses a memory device to provide inference results. Image data from a camera is provided to the memory device. The memory device stores the image data received from the camera. The memory device includes dynamic random access memory (DRAM), and static random access memory (SRAM). The memory device also includes a processor to run a neural network. The neural network uses the image data as input. An output from the neural network provides an inference result. In one example, the memory device has a same form factor as a conventional DRAM device. The memory device includes a multiply-accumulate (MAC) engine that supports computations for the neural network.

Abstract: A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buffering circuitry buffers instructions and/or data of an inactive one of the first and second concurrent threads. Thread switch logic in the multithreaded processor switches threads by activating the inactive thread and inactivating the active thread. The operation of the multithreaded processor is monitored by a performance monitor, which records occurrences of an event generated by switching threads.

Abstract: A method and system for performance monitoring within a multithreaded processor are provided. The system includes a processor responsive to instructions within first and second threads and a performance monitor that separately records a first event generated by the processor in response to the first thread and a second event generated by the processor in response to the second thread. In one embodiment, the processor has first and second modes of operation. In this embodiment, when the performance monitor is operating in the first mode, a first counter within the performance monitor increments in response to each occurrence of the first event and a second counter within the performance monitor increments in response to each occurrence of the second event. Alternatively, when the performance monitor is operating in the second mode, the first counter increments in response to each occurrence of the first event and in response to each occurrence of the second event.